1 /*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #if defined(DEVICE_NOR_MX25)
9 # include "nor/device_nor_mx25.h"
10 #elif defined(DEVICE_NOR_MT25)
11 # include "nor/device_nor_mt25.h"
12 #elif defined(DEVICE_NOR_S25)
13 # include "nor/device_nor_s25.h"
14 #elif defined(DEVICE_NOR_W25)
15 # include "nor/device_nor_w25.h"
16 #else
17 # error \
18 "not found correct definition, please check DEVICE_NOR in src/device.mk."
19 #endif
20
21 #include "mod_hsspi.h"
22 #include "mod_nor.h"
23 #include "qspi_api.h"
24
25 #include <fwk_module.h>
26
27 #include <stddef.h>
28
29 /* Configuration of the NOR module. */
30 static struct qspi_command nor_command_table[MOD_NOR_COMMAND_COUNT] = {
31 [MOD_NOR_COMMAND_RESET_ENABLE] = COMMAND_RESET_ENABLE,
32 [MOD_NOR_COMMAND_RESET_EXECUTE] = COMMAND_RESET_MEMORY,
33 [MOD_NOR_COMMAND_READ_ID] = COMMAND_READ_ID,
34 [MOD_NOR_COMMAND_READ_SFDP] = COMMAND_READ_SFDP,
35 [MOD_NOR_COMMAND_WRITE_ENABLE] = COMMAND_WRITE_ENABLE,
36 [MOD_NOR_COMMAND_WRITE_DISABLE] = COMMAND_WRITE_DISABLE,
37 [MOD_NOR_COMMAND_READ_STATUS] = COMMAND_READ_STATUS_REG,
38 [MOD_NOR_COMMAND_WRITE_STATUS] = COMMAND_WRITE_STATUS_REG,
39 [MOD_NOR_COMMAND_READ] = COMMAND_READ,
40 [MOD_NOR_COMMAND_FAST_READ] = COMMAND_FAST_READ,
41 [MOD_NOR_COMMAND_FAST_READ_1_1_2] = COMMAND_FAST_READ_1_1_2,
42 [MOD_NOR_COMMAND_FAST_READ_1_2_2] = COMMAND_FAST_READ_1_2_2,
43 [MOD_NOR_COMMAND_FAST_READ_1_1_4] = COMMAND_FAST_READ_1_1_4,
44 [MOD_NOR_COMMAND_FAST_READ_1_4_4] = COMMAND_FAST_READ_1_4_4,
45 [MOD_NOR_COMMAND_READ_4B] = COMMAND_READ_4B,
46 [MOD_NOR_COMMAND_FAST_READ_4B] = COMMAND_FAST_READ_4B,
47 [MOD_NOR_COMMAND_FAST_READ_1_1_2_4B] = COMMAND_FAST_READ_1_1_2_4B,
48 [MOD_NOR_COMMAND_FAST_READ_1_2_2_4B] = COMMAND_FAST_READ_1_2_2_4B,
49 [MOD_NOR_COMMAND_FAST_READ_1_1_4_4B] = COMMAND_FAST_READ_1_1_4_4B,
50 [MOD_NOR_COMMAND_FAST_READ_1_4_4_4B] = COMMAND_FAST_READ_1_4_4_4B,
51 [MOD_NOR_COMMAND_PROGRAM] = COMMAND_PROGRAM,
52 [MOD_NOR_COMMAND_PROGRAM_1_1_2] = COMMAND_PROGRAM_1_1_2,
53 [MOD_NOR_COMMAND_PROGRAM_1_2_2] = COMMAND_PROGRAM_1_2_2,
54 [MOD_NOR_COMMAND_PROGRAM_1_1_4] = COMMAND_PROGRAM_1_1_4,
55 [MOD_NOR_COMMAND_PROGRAM_1_4_4] = COMMAND_PROGRAM_1_4_4,
56 [MOD_NOR_COMMAND_PROGRAM_4B] = COMMAND_PROGRAM_4B,
57 [MOD_NOR_COMMAND_PROGRAM_1_1_4_4B] = COMMAND_PROGRAM_1_1_4_4B,
58 [MOD_NOR_COMMAND_PROGRAM_1_4_4_4B] = COMMAND_PROGRAM_1_4_4_4B,
59 [MOD_NOR_COMMAND_ERASE_SECTOR_4KB] = COMMAND_ERASE_4KB,
60 [MOD_NOR_COMMAND_ERASE_SECTOR_32KB] = COMMAND_ERASE_32KB,
61 [MOD_NOR_COMMAND_ERASE_BLOCK] = COMMAND_ERASE_BLOCK,
62 [MOD_NOR_COMMAND_ERASE_CHIP] = COMMAND_ERASE_CHIP,
63 [MOD_NOR_COMMAND_ERASE_SECTOR_4KB_4B] = COMMAND_ERASE_4KB_4B,
64 [MOD_NOR_COMMAND_ERASE_SECTOR_32KB_4B] = COMMAND_ERASE_32KB_4B,
65 [MOD_NOR_COMMAND_ERASE_BLOCK_4B] = COMMAND_ERASE_BLOCK_4B,
66 };
67
68 struct mod_nor_operation nor_operation = {
69 .set_io_protocol = nor_set_io_protocol,
70 .set_4byte_addr_mode = nor_set_4byte_addr_mode,
71 .get_program_result = nor_get_program_result,
72 .get_erase_result = nor_get_erase_result,
73 };
74
75 static struct fwk_element nor_dev_table[] = {
76 {
77 .name = "NOR",
78 .data = &((struct mod_nor_dev_config){
79 .driver_id = FWK_ID_ELEMENT_INIT(FWK_MODULE_IDX_HSSPI, 0),
80 .api_id =
81 FWK_ID_API_INIT(FWK_MODULE_IDX_HSSPI, QSPI_API_TYPE_DEFAULT),
82 .enable_reset_on_boot = true,
83 .program_page_size = PROGRAM_PAGE_SIZE,
84 .erase_block_size = ERASE_BLOCK_SIZE,
85 .command_table = nor_command_table,
86 .operation = &nor_operation,
87 }),
88 },
89 { 0 }, /* Termination description. */
90 };
91
nor_get_element_table(fwk_id_t module_id)92 static const struct fwk_element *nor_get_element_table(fwk_id_t module_id)
93 {
94 return nor_dev_table;
95 }
96
97 const struct fwk_module_config config_nor = {
98 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(nor_get_element_table),
99
100 };
101