1 /*
2  * Arm SCP/MCP Software
3  * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #ifndef DPU_PIK_H
9 #define DPU_PIK_H
10 
11 #include "scp_css_mmap.h"
12 
13 #include <fwk_macros.h>
14 
15 #include <stdint.h>
16 
17 /*!
18  * \brief DPU PIK register definitions
19  */
20 struct pik_dpu_reg {
21     FWK_R uint8_t RESERVED0[0x830];
22     FWK_RW uint32_t ACLKDP_CTRL;
23     FWK_RW uint32_t ACLKDP_DIV1;
24     FWK_RW uint32_t ACLKDP_DIV2;
25     uint8_t RESERVED3[0xA00 - 0x83C];
26     FWK_R uint32_t CLKFORCE_STATUS;
27     FWK_W uint32_t CLKFORCE_SET;
28     FWK_W uint32_t CLKFORCE_CLR;
29     uint8_t RESERVED4[0xFC0 - 0xA0C];
30     FWK_RW uint32_t PCL_CONFIG;
31     uint8_t RESERVED5[0xFD0 - 0xFC4];
32     FWK_R uint32_t PID4;
33     FWK_R uint32_t PID5;
34     FWK_R uint32_t PID6;
35     FWK_R uint32_t PID7;
36     FWK_R uint32_t PID0;
37     FWK_R uint32_t PID1;
38     FWK_R uint32_t PID2;
39     FWK_R uint32_t PID3;
40     FWK_R uint32_t ID0;
41     FWK_R uint32_t ID1;
42     FWK_R uint32_t ID2;
43     FWK_R uint32_t ID3;
44 };
45 
46 #define DPU_PIK_PTR ((struct pik_dpu_reg *)SCP_PIK_DPU_BASE)
47 
48 #endif /* DPU_PIK_H */
49