1 /* 2 * Arm SCP/MCP Software 3 * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef TC0_SDS_H 9 #define TC0_SDS_H 10 11 #include <mod_sds.h> 12 13 /* 14 * Structure identifiers. 15 */ 16 enum tc0_sds_struct_id { 17 TC0_SDS_CPU_INFO = 1 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 18 TC0_SDS_FEATURE_AVAILABILITY = 6 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 19 TC0_SDS_BOOTLOADER = 9 | (1 << MOD_SDS_ID_VERSION_MAJOR_POS), 20 }; 21 22 enum tc0_sds_region_idx { TC0_SDS_REGION_SECURE, TC0_SDS_REGION_COUNT }; 23 24 /* 25 * Structure sizes. 26 */ 27 #define TC0_SDS_CPU_INFO_SIZE 4 28 #define TC0_SDS_FEATURE_AVAILABILITY_SIZE 4 29 #define TC0_SDS_BOOTLOADER_SIZE 12 30 31 /* 32 * Field masks and offsets for TC0_SDS_AP_CPU_INFO structure. 33 */ 34 #define TC0_SDS_CPU_INFO_PRIMARY_MASK 0xFFFFFFFF 35 #define TC0_SDS_CPU_INFO_PRIMARY_POS 0 36 37 /* 38 * Field masks and offsets for TC0_SDS_FEATURE_AVAILABILITY structure. 39 */ 40 #define TC0_SDS_FEATURE_FIRMWARE_MASK 0x1 41 #define TC0_SDS_FEATURE_DMC_MASK 0x2 42 #define TC0_SDS_FEATURE_MESSAGING_MASK 0x4 43 44 #define TC0_SDS_FEATURE_FIRMWARE_POS 0 45 #define TC0_SDS_FEATURE_DMC_POS 1 46 #define TC0_SDS_FEATURE_MESSAGING_POS 2 47 48 /* 49 * Field masks and offsets for the TC0_SDS_BOOTLOADER structure. 50 */ 51 #define TC0_SDS_BOOTLOADER_VALID_MASK 0x1 52 #define TC0_SDS_BOOTLOADER_OFFSET_MASK 0xFFFFFFFF 53 #define TC0_SDS_BOOTLOADER_SIZE_MASK 0xFFFFFFFF 54 55 #define TC0_SDS_BOOTLOADER_VALID_POS 0 56 #define TC0_SDS_BOOTLOADER_OFFSET_POS 0 57 #define TC0_SDS_BOOTLOADER_SIZE_POS 0 58 59 #endif /* TC0_SDS_H */ 60