1 /*
2 * Arm SCP/MCP Software
3 * Copyright (c) 2020-2021, Arm Limited and Contributors. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include "clock_soc.h"
9 #include "scp_pik.h"
10 #include "scp_soc_mmap.h"
11
12 #include <mod_system_pll.h>
13
14 #include <fwk_element.h>
15 #include <fwk_id.h>
16 #include <fwk_macros.h>
17 #include <fwk_module.h>
18
19 static const struct fwk_element system_pll_element_table[] = {
20 [CLOCK_PLL_IDX_CPU_KLEIN] =
21 {
22 .name = "CPU_PLL_KLEIN",
23 .data = &((struct mod_system_pll_dev_config){
24 .control_reg = (void *)SCP_PLL_CPU_TYPE0,
25 .status_reg = (void *)&SCP_PIK_PTR->PLL_STATUS[1],
26 .lock_flag_mask = PLL_STATUS_CPUPLLLOCK(0),
27 .initial_rate = 1537 * FWK_MHZ,
28 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
29 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
30 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
31 }),
32 },
33 [CLOCK_PLL_IDX_SYS] =
34 {
35 .name = "SYS_PLL",
36 .data = &((struct mod_system_pll_dev_config){
37 .control_reg = (void *)SCP_PLL_SYSPLL,
38 .status_reg = (void *)&SCP_PIK_PTR->PLL_STATUS[0],
39 .lock_flag_mask = PLL_STATUS_0_SYSPLLLOCK,
40 .initial_rate = 2000 * FWK_MHZ,
41 .min_rate = MOD_SYSTEM_PLL_MIN_RATE,
42 .max_rate = MOD_SYSTEM_PLL_MAX_RATE,
43 .min_step = MOD_SYSTEM_PLL_MIN_INTERVAL,
44 }),
45 },
46 [CLOCK_PLL_IDX_COUNT] = { 0 }, /* Termination description. */
47 };
48
system_pll_get_element_table(fwk_id_t module_id)49 static const struct fwk_element *system_pll_get_element_table(
50 fwk_id_t module_id)
51 {
52 return system_pll_element_table;
53 }
54
55 const struct fwk_module_config config_system_pll = {
56 .elements = FWK_MODULE_DYNAMIC_ELEMENTS(system_pll_get_element_table),
57 };
58