1/* 2 * Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <common/bl_common.h> 9#include <el3_common_macros.S> 10 11 .globl bl1_entrypoint 12 .globl bl1_run_bl2_in_root 13 14 15 /* ----------------------------------------------------- 16 * bl1_entrypoint() is the entry point into the trusted 17 * firmware code when a cpu is released from warm or 18 * cold reset. 19 * ----------------------------------------------------- 20 */ 21 22func bl1_entrypoint 23 /* --------------------------------------------------------------------- 24 * If the reset address is programmable then bl1_entrypoint() is 25 * executed only on the cold boot path. Therefore, we can skip the warm 26 * boot mailbox mechanism. 27 * --------------------------------------------------------------------- 28 */ 29 el3_entrypoint_common \ 30 _init_sctlr=1 \ 31 _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ 32 _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ 33 _init_memory=1 \ 34 _init_c_runtime=1 \ 35 _exception_vectors=bl1_exceptions \ 36 _pie_fixup_size=0 37 38 /* -------------------------------------------------------------------- 39 * Perform BL1 setup 40 * -------------------------------------------------------------------- 41 */ 42 bl bl1_setup 43 44#if ENABLE_PAUTH 45 /* -------------------------------------------------------------------- 46 * Program APIAKey_EL1 and enable pointer authentication. 47 * -------------------------------------------------------------------- 48 */ 49 bl pauth_init_enable_el3 50#endif /* ENABLE_PAUTH */ 51 52 /* -------------------------------------------------------------------- 53 * Initialize platform and jump to our c-entry point 54 * for this type of reset. 55 * -------------------------------------------------------------------- 56 */ 57 bl bl1_main 58 59#if ENABLE_PAUTH 60 /* -------------------------------------------------------------------- 61 * Disable pointer authentication before jumping to next boot image. 62 * -------------------------------------------------------------------- 63 */ 64 bl pauth_disable_el3 65#endif /* ENABLE_PAUTH */ 66 67 /* -------------------------------------------------- 68 * Do the transition to next boot image. 69 * -------------------------------------------------- 70 */ 71#if ENABLE_RME 72 b bl1_run_bl2_in_root 73#else 74 b el3_exit 75#endif 76endfunc bl1_entrypoint 77 78 /* ----------------------------------------------------- 79 * void bl1_run_bl2_in_root(); 80 * This function runs BL2 in root/EL3 when RME is enabled. 81 * ----------------------------------------------------- 82 */ 83 84func bl1_run_bl2_in_root 85 /* read bl2_ep_info */ 86 adrp x20, bl2_ep_info 87 add x20, x20, :lo12:bl2_ep_info 88 ldr x20, [x20] 89 90 /* --------------------------------------------- 91 * MMU needs to be disabled because BL2 executes 92 * in EL3. It will initialize the address space 93 * according to its own requirements. 94 * --------------------------------------------- 95 */ 96 bl disable_mmu_icache_el3 97 tlbi alle3 98 99 ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET] 100 msr elr_el3, x0 101 msr spsr_el3, x1 102 103 ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)] 104 ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)] 105 ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)] 106 ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)] 107 exception_return 108endfunc bl1_run_bl2_in_root 109