1/* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <asm_macros.S> 8#include <common/bl_common.h> 9 10/* ----------------------------------------------------------------------------- 11 * Very simple stackless exception handlers used by BL2 and BL31 stages. 12 * BL31 uses them before stacks are setup. BL2 uses them throughout. 13 * ----------------------------------------------------------------------------- 14 */ 15 .globl early_exceptions 16 17vector_base early_exceptions 18 19 /* ----------------------------------------------------- 20 * Current EL with SP0 : 0x0 - 0x200 21 * ----------------------------------------------------- 22 */ 23vector_entry SynchronousExceptionSP0 24 mov x0, #SYNC_EXCEPTION_SP_EL0 25 bl plat_report_exception 26 no_ret plat_panic_handler 27end_vector_entry SynchronousExceptionSP0 28 29vector_entry IrqSP0 30 mov x0, #IRQ_SP_EL0 31 bl plat_report_exception 32 no_ret plat_panic_handler 33end_vector_entry IrqSP0 34 35vector_entry FiqSP0 36 mov x0, #FIQ_SP_EL0 37 bl plat_report_exception 38 no_ret plat_panic_handler 39end_vector_entry FiqSP0 40 41vector_entry SErrorSP0 42 mov x0, #SERROR_SP_EL0 43 bl plat_report_exception 44 no_ret plat_panic_handler 45end_vector_entry SErrorSP0 46 47 /* ----------------------------------------------------- 48 * Current EL with SPx: 0x200 - 0x400 49 * ----------------------------------------------------- 50 */ 51vector_entry SynchronousExceptionSPx 52 mov x0, #SYNC_EXCEPTION_SP_ELX 53 bl plat_report_exception 54 no_ret plat_panic_handler 55end_vector_entry SynchronousExceptionSPx 56 57vector_entry IrqSPx 58 mov x0, #IRQ_SP_ELX 59 bl plat_report_exception 60 no_ret plat_panic_handler 61end_vector_entry IrqSPx 62 63vector_entry FiqSPx 64 mov x0, #FIQ_SP_ELX 65 bl plat_report_exception 66 no_ret plat_panic_handler 67end_vector_entry FiqSPx 68 69vector_entry SErrorSPx 70 mov x0, #SERROR_SP_ELX 71 bl plat_report_exception 72 no_ret plat_panic_handler 73end_vector_entry SErrorSPx 74 75 /* ----------------------------------------------------- 76 * Lower EL using AArch64 : 0x400 - 0x600 77 * ----------------------------------------------------- 78 */ 79vector_entry SynchronousExceptionA64 80 mov x0, #SYNC_EXCEPTION_AARCH64 81 bl plat_report_exception 82 no_ret plat_panic_handler 83end_vector_entry SynchronousExceptionA64 84 85vector_entry IrqA64 86 mov x0, #IRQ_AARCH64 87 bl plat_report_exception 88 no_ret plat_panic_handler 89end_vector_entry IrqA64 90 91vector_entry FiqA64 92 mov x0, #FIQ_AARCH64 93 bl plat_report_exception 94 no_ret plat_panic_handler 95end_vector_entry FiqA64 96 97vector_entry SErrorA64 98 mov x0, #SERROR_AARCH64 99 bl plat_report_exception 100 no_ret plat_panic_handler 101end_vector_entry SErrorA64 102 103 /* ----------------------------------------------------- 104 * Lower EL using AArch32 : 0x600 - 0x800 105 * ----------------------------------------------------- 106 */ 107vector_entry SynchronousExceptionA32 108 mov x0, #SYNC_EXCEPTION_AARCH32 109 bl plat_report_exception 110 no_ret plat_panic_handler 111end_vector_entry SynchronousExceptionA32 112 113vector_entry IrqA32 114 mov x0, #IRQ_AARCH32 115 bl plat_report_exception 116 no_ret plat_panic_handler 117end_vector_entry IrqA32 118 119vector_entry FiqA32 120 mov x0, #FIQ_AARCH32 121 bl plat_report_exception 122 no_ret plat_panic_handler 123end_vector_entry FiqA32 124 125vector_entry SErrorA32 126 mov x0, #SERROR_AARCH32 127 bl plat_report_exception 128 no_ret plat_panic_handler 129end_vector_entry SErrorA32 130