1 /*
2  * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef SMMU_V3_H
8 #define SMMU_V3_H
9 
10 #include <stdint.h>
11 #include <lib/utils_def.h>
12 #include <platform_def.h>
13 
14 /* SMMUv3 register offsets from device base */
15 #define SMMU_CR0	U(0x0020)
16 #define SMMU_CR0ACK	U(0x0024)
17 #define SMMU_GBPA	U(0x0044)
18 #define SMMU_S_IDR1	U(0x8004)
19 #define SMMU_S_INIT	U(0x803c)
20 #define SMMU_S_GBPA	U(0x8044)
21 
22 /*
23  * TODO: SMMU_ROOT_PAGE_OFFSET is platform specific.
24  * Currently defined as a command line model parameter.
25  */
26 #if ENABLE_RME
27 
28 #define SMMU_ROOT_PAGE_OFFSET	(PLAT_ARM_SMMUV3_ROOT_REG_OFFSET)
29 #define SMMU_ROOT_IDR0		U(SMMU_ROOT_PAGE_OFFSET + 0x0000)
30 #define SMMU_ROOT_IIDR		U(SMMU_ROOT_PAGE_OFFSET + 0x0008)
31 #define SMMU_ROOT_CR0		U(SMMU_ROOT_PAGE_OFFSET + 0x0020)
32 #define SMMU_ROOT_CR0ACK	U(SMMU_ROOT_PAGE_OFFSET + 0x0024)
33 #define SMMU_ROOT_GPT_BASE	U(SMMU_ROOT_PAGE_OFFSET + 0x0028)
34 #define SMMU_ROOT_GPT_BASE_CFG	U(SMMU_ROOT_PAGE_OFFSET + 0x0030)
35 #define SMMU_ROOT_GPF_FAR	U(SMMU_ROOT_PAGE_OFFSET + 0x0038)
36 #define SMMU_ROOT_GPT_CFG_FAR	U(SMMU_ROOT_PAGE_OFFSET + 0x0040)
37 #define SMMU_ROOT_TLBI		U(SMMU_ROOT_PAGE_OFFSET + 0x0050)
38 #define SMMU_ROOT_TLBI_CTRL	U(SMMU_ROOT_PAGE_OFFSET + 0x0058)
39 
40 #endif /* ENABLE_RME */
41 
42 /* SMMU_CR0 and SMMU_CR0ACK register fields */
43 #define SMMU_CR0_SMMUEN			(1UL << 0)
44 
45 /* SMMU_GBPA register fields */
46 #define SMMU_GBPA_UPDATE		(1UL << 31)
47 #define SMMU_GBPA_ABORT			(1UL << 20)
48 
49 /* SMMU_S_IDR1 register fields */
50 #define SMMU_S_IDR1_SECURE_IMPL		(1UL << 31)
51 
52 /* SMMU_S_INIT register fields */
53 #define SMMU_S_INIT_INV_ALL		(1UL << 0)
54 
55 /* SMMU_S_GBPA register fields */
56 #define SMMU_S_GBPA_UPDATE		(1UL << 31)
57 #define SMMU_S_GBPA_ABORT		(1UL << 20)
58 
59 /* SMMU_ROOT_IDR0 register fields */
60 #define SMMU_ROOT_IDR0_ROOT_IMPL	(1UL << 0)
61 
62 /* SMMU_ROOT_CR0 register fields */
63 #define SMMU_ROOT_CR0_GPCEN		(1UL << 1)
64 #define SMMU_ROOT_CR0_ACCESSEN		(1UL << 0)
65 
66 int smmuv3_init(uintptr_t smmu_base);
67 int smmuv3_security_init(uintptr_t smmu_base);
68 
69 int smmuv3_ns_set_abort_all(uintptr_t smmu_base);
70 
71 #endif /* SMMU_V3_H */
72