1 /* 2 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef MMC_H 8 #define MMC_H 9 10 #include <stdint.h> 11 12 #include <lib/utils_def.h> 13 14 #define MMC_BLOCK_SIZE U(512) 15 #define MMC_BLOCK_MASK (MMC_BLOCK_SIZE - U(1)) 16 #define MMC_BOOT_CLK_RATE (400 * 1000) 17 18 #define MMC_CMD(_x) U(_x) 19 20 #define MMC_ACMD(_x) U(_x) 21 22 #define OCR_POWERUP BIT(31) 23 #define OCR_HCS BIT(30) 24 #define OCR_BYTE_MODE (U(0) << 29) 25 #define OCR_SECTOR_MODE (U(2) << 29) 26 #define OCR_ACCESS_MODE_MASK (U(3) << 29) 27 #define OCR_3_5_3_6 BIT(23) 28 #define OCR_3_4_3_5 BIT(22) 29 #define OCR_3_3_3_4 BIT(21) 30 #define OCR_3_2_3_3 BIT(20) 31 #define OCR_3_1_3_2 BIT(19) 32 #define OCR_3_0_3_1 BIT(18) 33 #define OCR_2_9_3_0 BIT(17) 34 #define OCR_2_8_2_9 BIT(16) 35 #define OCR_2_7_2_8 BIT(15) 36 #define OCR_VDD_MIN_2V7 GENMASK(23, 15) 37 #define OCR_VDD_MIN_2V0 GENMASK(14, 8) 38 #define OCR_VDD_MIN_1V7 BIT(7) 39 40 #define MMC_RSP_48 BIT(0) 41 #define MMC_RSP_136 BIT(1) /* 136 bit response */ 42 #define MMC_RSP_CRC BIT(2) /* expect valid crc */ 43 #define MMC_RSP_CMD_IDX BIT(3) /* response contains cmd idx */ 44 #define MMC_RSP_BUSY BIT(4) /* device may be busy */ 45 46 /* JEDEC 4.51 chapter 6.12 */ 47 #define MMC_RESPONSE_R1 (MMC_RSP_48 | MMC_RSP_CMD_IDX | MMC_RSP_CRC) 48 #define MMC_RESPONSE_R1B (MMC_RESPONSE_R1 | MMC_RSP_BUSY) 49 #define MMC_RESPONSE_R2 (MMC_RSP_48 | MMC_RSP_136 | MMC_RSP_CRC) 50 #define MMC_RESPONSE_R3 (MMC_RSP_48) 51 #define MMC_RESPONSE_R4 (MMC_RSP_48) 52 #define MMC_RESPONSE_R5 (MMC_RSP_48 | MMC_RSP_CRC | MMC_RSP_CMD_IDX) 53 #define MMC_RESPONSE_R6 (MMC_RSP_48 | MMC_RSP_CRC | MMC_RSP_CMD_IDX) 54 #define MMC_RESPONSE_R7 (MMC_RSP_48 | MMC_RSP_CRC | MMC_RSP_CMD_IDX) 55 56 /* Value randomly chosen for eMMC RCA, it should be > 1 */ 57 #define MMC_FIX_RCA 6 58 #define RCA_SHIFT_OFFSET 16 59 60 #define CMD_EXTCSD_PARTITION_CONFIG 179 61 #define CMD_EXTCSD_BUS_WIDTH 183 62 #define CMD_EXTCSD_HS_TIMING 185 63 #define CMD_EXTCSD_PART_SWITCH_TIME 199 64 #define CMD_EXTCSD_SEC_CNT 212 65 #define CMD_EXTCSD_BOOT_SIZE_MULT 226 66 67 #define EXT_CSD_PART_CONFIG_ACC_MASK GENMASK(2, 0) 68 #define PART_CFG_BOOT_PARTITION1_ENABLE (U(1) << 3) 69 #define PART_CFG_BOOT_PARTITION1_ACCESS (U(1) << 0) 70 #define PART_CFG_BOOT_PARTITION_NO_ACCESS U(0) 71 #define PART_CFG_BOOT_PART_EN_MASK GENMASK(5, 3) 72 #define PART_CFG_BOOT_PART_EN_SHIFT 3 73 #define PART_CFG_CURRENT_BOOT_PARTITION(x) (((x) & PART_CFG_BOOT_PART_EN_MASK) >> \ 74 PART_CFG_BOOT_PART_EN_SHIFT) 75 76 /* Values in EXT CSD register */ 77 #define MMC_BUS_WIDTH_1 U(0) 78 #define MMC_BUS_WIDTH_4 U(1) 79 #define MMC_BUS_WIDTH_8 U(2) 80 #define MMC_BUS_WIDTH_DDR_4 U(5) 81 #define MMC_BUS_WIDTH_DDR_8 U(6) 82 #define MMC_BOOT_MODE_BACKWARD (U(0) << 3) 83 #define MMC_BOOT_MODE_HS_TIMING (U(1) << 3) 84 #define MMC_BOOT_MODE_DDR (U(2) << 3) 85 86 #define EXTCSD_SET_CMD (U(0) << 24) 87 #define EXTCSD_SET_BITS (U(1) << 24) 88 #define EXTCSD_CLR_BITS (U(2) << 24) 89 #define EXTCSD_WRITE_BYTES (U(3) << 24) 90 #define EXTCSD_CMD(x) (((x) & 0xff) << 16) 91 #define EXTCSD_VALUE(x) (((x) & 0xff) << 8) 92 #define EXTCSD_CMD_SET_NORMAL U(1) 93 94 #define CSD_TRAN_SPEED_UNIT_MASK GENMASK(2, 0) 95 #define CSD_TRAN_SPEED_MULT_MASK GENMASK(6, 3) 96 #define CSD_TRAN_SPEED_MULT_SHIFT 3 97 98 #define STATUS_CURRENT_STATE(x) (((x) & 0xf) << 9) 99 #define STATUS_READY_FOR_DATA BIT(8) 100 #define STATUS_SWITCH_ERROR BIT(7) 101 #define MMC_GET_STATE(x) (((x) >> 9) & 0xf) 102 #define MMC_STATE_IDLE 0 103 #define MMC_STATE_READY 1 104 #define MMC_STATE_IDENT 2 105 #define MMC_STATE_STBY 3 106 #define MMC_STATE_TRAN 4 107 #define MMC_STATE_DATA 5 108 #define MMC_STATE_RCV 6 109 #define MMC_STATE_PRG 7 110 #define MMC_STATE_DIS 8 111 #define MMC_STATE_BTST 9 112 #define MMC_STATE_SLP 10 113 114 #define MMC_FLAG_CMD23 (U(1) << 0) 115 #define MMC_FLAG_SD_CMD6 (U(1) << 1) 116 117 #define CMD8_CHECK_PATTERN U(0xAA) 118 #define VHS_2_7_3_6_V BIT(8) 119 120 #define SD_SCR_BUS_WIDTH_1 BIT(8) 121 #define SD_SCR_BUS_WIDTH_4 BIT(10) 122 123 #define SD_SWITCH_FUNC_CHECK 0U 124 #define SD_SWITCH_FUNC_SWITCH BIT(31) 125 #define SD_SWITCH_ALL_GROUPS_MASK GENMASK(23, 0) 126 127 struct mmc_cmd { 128 unsigned int cmd_idx; 129 unsigned int cmd_arg; 130 unsigned int resp_type; 131 unsigned int resp_data[4]; 132 }; 133 134 struct mmc_ops { 135 void (*init)(void); 136 int (*send_cmd)(struct mmc_cmd *cmd); 137 int (*set_ios)(unsigned int clk, unsigned int width); 138 int (*prepare)(int lba, uintptr_t buf, size_t size); 139 int (*read)(int lba, uintptr_t buf, size_t size); 140 int (*write)(int lba, const uintptr_t buf, size_t size); 141 }; 142 143 struct mmc_csd_emmc { 144 unsigned int not_used: 1; 145 unsigned int crc: 7; 146 unsigned int ecc: 2; 147 unsigned int file_format: 2; 148 unsigned int tmp_write_protect: 1; 149 unsigned int perm_write_protect: 1; 150 unsigned int copy: 1; 151 unsigned int file_format_grp: 1; 152 153 unsigned int reserved_1: 5; 154 unsigned int write_bl_partial: 1; 155 unsigned int write_bl_len: 4; 156 unsigned int r2w_factor: 3; 157 unsigned int default_ecc: 2; 158 unsigned int wp_grp_enable: 1; 159 160 unsigned int wp_grp_size: 5; 161 unsigned int erase_grp_mult: 5; 162 unsigned int erase_grp_size: 5; 163 unsigned int c_size_mult: 3; 164 unsigned int vdd_w_curr_max: 3; 165 unsigned int vdd_w_curr_min: 3; 166 unsigned int vdd_r_curr_max: 3; 167 unsigned int vdd_r_curr_min: 3; 168 unsigned int c_size_low: 2; 169 170 unsigned int c_size_high: 10; 171 unsigned int reserved_2: 2; 172 unsigned int dsr_imp: 1; 173 unsigned int read_blk_misalign: 1; 174 unsigned int write_blk_misalign: 1; 175 unsigned int read_bl_partial: 1; 176 unsigned int read_bl_len: 4; 177 unsigned int ccc: 12; 178 179 unsigned int tran_speed: 8; 180 unsigned int nsac: 8; 181 unsigned int taac: 8; 182 unsigned int reserved_3: 2; 183 unsigned int spec_vers: 4; 184 unsigned int csd_structure: 2; 185 }; 186 187 struct mmc_csd_sd_v2 { 188 unsigned int not_used: 1; 189 unsigned int crc: 7; 190 unsigned int reserved_1: 2; 191 unsigned int file_format: 2; 192 unsigned int tmp_write_protect: 1; 193 unsigned int perm_write_protect: 1; 194 unsigned int copy: 1; 195 unsigned int file_format_grp: 1; 196 197 unsigned int reserved_2: 5; 198 unsigned int write_bl_partial: 1; 199 unsigned int write_bl_len: 4; 200 unsigned int r2w_factor: 3; 201 unsigned int reserved_3: 2; 202 unsigned int wp_grp_enable: 1; 203 204 unsigned int wp_grp_size: 7; 205 unsigned int sector_size: 7; 206 unsigned int erase_block_en: 1; 207 unsigned int reserved_4: 1; 208 unsigned int c_size_low: 16; 209 210 unsigned int c_size_high: 6; 211 unsigned int reserved_5: 6; 212 unsigned int dsr_imp: 1; 213 unsigned int read_blk_misalign: 1; 214 unsigned int write_blk_misalign: 1; 215 unsigned int read_bl_partial: 1; 216 unsigned int read_bl_len: 4; 217 unsigned int ccc: 12; 218 219 unsigned int tran_speed: 8; 220 unsigned int nsac: 8; 221 unsigned int taac: 8; 222 unsigned int reserved_6: 6; 223 unsigned int csd_structure: 2; 224 }; 225 226 struct sd_switch_status { 227 unsigned short max_current; 228 unsigned short support_g6; 229 unsigned short support_g5; 230 unsigned short support_g4; 231 unsigned short support_g3; 232 unsigned short support_g2; 233 unsigned short support_g1; 234 unsigned char sel_g6_g5; 235 unsigned char sel_g4_g3; 236 unsigned char sel_g2_g1; 237 unsigned char data_struct_ver; 238 unsigned short busy_g6; 239 unsigned short busy_g5; 240 unsigned short busy_g4; 241 unsigned short busy_g3; 242 unsigned short busy_g2; 243 unsigned short busy_g1; 244 unsigned short reserved[17]; 245 }; 246 247 enum mmc_device_type { 248 MMC_IS_EMMC, 249 MMC_IS_SD, 250 MMC_IS_SD_HC, 251 }; 252 253 struct mmc_device_info { 254 unsigned long long device_size; /* Size of device in bytes */ 255 unsigned int block_size; /* Block size in bytes */ 256 unsigned int max_bus_freq; /* Max bus freq in Hz */ 257 unsigned int ocr_voltage; /* OCR voltage */ 258 enum mmc_device_type mmc_dev_type; /* Type of MMC */ 259 }; 260 261 size_t mmc_read_blocks(int lba, uintptr_t buf, size_t size); 262 size_t mmc_write_blocks(int lba, const uintptr_t buf, size_t size); 263 size_t mmc_erase_blocks(int lba, size_t size); 264 int mmc_part_switch_current_boot(void); 265 int mmc_part_switch_user(void); 266 size_t mmc_boot_part_size(void); 267 size_t mmc_boot_part_read_blocks(int lba, uintptr_t buf, size_t size); 268 int mmc_init(const struct mmc_ops *ops_ptr, unsigned int clk, 269 unsigned int width, unsigned int flags, 270 struct mmc_device_info *device_info); 271 272 #endif /* MMC_H */ 273