1 /*
2  * Copyright 2021 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef CSU_H
9 #define CSU_H
10 
11 #define CSU_SEC_ACCESS_REG_OFFSET	(0x0021CU)
12 /* Bit mask */
13 #define TZASC_BYPASS_MUX_DISABLE        (0x4U)
14 
15 /* Macros defining access permissions to configure
16  * the regions controlled by Central Security Unit.
17  */
18 enum csu_cslx_access {
19 	CSU_NS_SUP_R = (0x8U),
20 	CSU_NS_SUP_W = (0x80U),
21 	CSU_NS_SUP_RW = (0x88U),
22 	CSU_NS_USER_R = (0x4U),
23 	CSU_NS_USER_W = (0x40U),
24 	CSU_NS_USER_RW = (0x44U),
25 	CSU_S_SUP_R = (0x2U),
26 	CSU_S_SUP_W = (0x20U),
27 	CSU_S_SUP_RW = (0x22U),
28 	CSU_S_USER_R = (0x1U),
29 	CSU_S_USER_W = (0x10U),
30 	CSU_S_USER_RW = (0x11U),
31 	CSU_ALL_RW = (0xffU),
32 };
33 
34 struct csu_ns_dev_st {
35 	uintptr_t ind;
36 	uint32_t val;
37 };
38 
39 void enable_layerscape_ns_access(struct csu_ns_dev_st *csu_ns_dev,
40 				 uint32_t num, uintptr_t nxp_csu_addr);
41 
42 #endif
43