1 /* 2 * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef STM32_UART_H 8 #define STM32_UART_H 9 10 /* UART word length */ 11 #define STM32_UART_WORDLENGTH_7B USART_CR1_M1 12 #define STM32_UART_WORDLENGTH_8B 0x00000000U 13 #define STM32_UART_WORDLENGTH_9B USART_CR1_M0 14 15 /* UART number of stop bits */ 16 #define STM32_UART_STOPBITS_0_5 USART_CR2_STOP_0 17 #define STM32_UART_STOPBITS_1 0x00000000U 18 #define STM32_UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) 19 #define STM32_UART_STOPBITS_2 USART_CR2_STOP_1 20 21 /* UART parity */ 22 #define STM32_UART_PARITY_NONE 0x00000000U 23 #define STM32_UART_PARITY_EVEN USART_CR1_PCE 24 #define STM32_UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) 25 26 /* UART transfer mode */ 27 #define STM32_UART_MODE_RX USART_CR1_RE 28 #define STM32_UART_MODE_TX USART_CR1_TE 29 #define STM32_UART_MODE_TX_RX (USART_CR1_TE | USART_CR1_RE) 30 31 /* UART hardware flow control */ 32 #define STM32_UART_HWCONTROL_NONE 0x00000000U 33 #define STM32_UART_HWCONTROL_RTS USART_CR3_RTSE 34 #define STM32_UART_HWCONTROL_CTS USART_CR3_CTSE 35 #define STM32_UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) 36 37 /* UART prescaler */ 38 #define STM32_UART_PRESCALER_DIV1 0x00000000U 39 #define STM32_UART_PRESCALER_DIV2 0x00000001U 40 #define STM32_UART_PRESCALER_DIV4 0x00000002U 41 #define STM32_UART_PRESCALER_DIV6 0x00000003U 42 #define STM32_UART_PRESCALER_DIV8 0x00000004U 43 #define STM32_UART_PRESCALER_DIV10 0x00000005U 44 #define STM32_UART_PRESCALER_DIV12 0x00000006U 45 #define STM32_UART_PRESCALER_DIV16 0x00000007U 46 #define STM32_UART_PRESCALER_DIV32 0x00000008U 47 #define STM32_UART_PRESCALER_DIV64 0x00000009U 48 #define STM32_UART_PRESCALER_DIV128 0x0000000AU 49 #define STM32_UART_PRESCALER_DIV256 0x0000000BU 50 #define STM32_UART_PRESCALER_NB 0x0000000CU 51 52 /* UART fifo mode */ 53 #define STM32_UART_FIFOMODE_EN USART_CR1_FIFOEN 54 #define STM32_UART_FIFOMODE_DIS 0x00000000U 55 56 /* UART TXFIFO threshold level */ 57 #define STM32_UART_TXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U 58 #define STM32_UART_TXFIFO_THRESHOLD_1QUARTERFUL USART_CR3_TXFTCFG_0 59 #define STM32_UART_TXFIFO_THRESHOLD_HALFFULL USART_CR3_TXFTCFG_1 60 #define STM32_UART_TXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_TXFTCFG_0 | USART_CR3_TXFTCFG_1) 61 #define STM32_UART_TXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_TXFTCFG_2 62 #define STM32_UART_TXFIFO_THRESHOLD_EMPTY (USART_CR3_TXFTCFG_2 | USART_CR3_TXFTCFG_0) 63 64 /* UART RXFIFO threshold level */ 65 #define STM32_UART_RXFIFO_THRESHOLD_1EIGHTHFULL 0x00000000U 66 #define STM32_UART_RXFIFO_THRESHOLD_1QUARTERFULL USART_CR3_RXFTCFG_0 67 #define STM32_UART_RXFIFO_THRESHOLD_HALFFULL USART_CR3_RXFTCFG_1 68 #define STM32_UART_RXFIFO_THRESHOLD_3QUARTERSFULL (USART_CR3_RXFTCFG_0 | USART_CR3_RXFTCFG_1) 69 #define STM32_UART_RXFIFO_THRESHOLD_7EIGHTHFULL USART_CR3_RXFTCFG_2 70 #define STM32_UART_RXFIFO_THRESHOLD_FULL (USART_CR3_RXFTCFG_2 | USART_CR3_RXFTCFG_0) 71 72 struct stm32_uart_init_s { 73 uint32_t baud_rate; /* 74 * Configures the UART communication 75 * baud rate. 76 */ 77 78 uint32_t word_length; /* 79 * Specifies the number of data bits 80 * transmitted or received in a frame. 81 * This parameter can be a value of 82 * @ref STM32_UART_WORDLENGTH_*. 83 */ 84 85 uint32_t stop_bits; /* 86 * Specifies the number of stop bits 87 * transmitted. This parameter can be 88 * a value of @ref STM32_UART_STOPBITS_*. 89 */ 90 91 uint32_t parity; /* 92 * Specifies the parity mode. 93 * This parameter can be a value of 94 * @ref STM32_UART_PARITY_*. 95 */ 96 97 uint32_t mode; /* 98 * Specifies whether the receive or 99 * transmit mode is enabled or 100 * disabled. This parameter can be a 101 * value of @ref @ref STM32_UART_MODE_*. 102 */ 103 104 uint32_t hw_flow_control; /* 105 * Specifies whether the hardware flow 106 * control mode is enabled or 107 * disabled. This parameter can be a 108 * value of @ref STM32_UARTHWCONTROL_*. 109 */ 110 111 uint32_t one_bit_sampling; /* 112 * Specifies whether a single sample 113 * or three samples' majority vote is 114 * selected. This parameter can be 0 115 * or USART_CR3_ONEBIT. 116 */ 117 118 uint32_t prescaler; /* 119 * Specifies the prescaler value used 120 * to divide the UART clock source. 121 * This parameter can be a value of 122 * @ref STM32_UART_PRESCALER_*. 123 */ 124 125 uint32_t fifo_mode; /* 126 * Specifies if the FIFO mode will be 127 * used. This parameter can be a value 128 * of @ref STM32_UART_FIFOMODE_*. 129 */ 130 131 uint32_t tx_fifo_threshold; /* 132 * Specifies the TXFIFO threshold 133 * level. This parameter can be a 134 * value of @ref 135 * STM32_UART_TXFIFO_THRESHOLD_*. 136 */ 137 138 uint32_t rx_fifo_threshold; /* 139 * Specifies the RXFIFO threshold 140 * level. This parameter can be a 141 * value of @ref 142 * STM32_UART_RXFIFO_THRESHOLD_*. 143 */ 144 }; 145 146 struct stm32_uart_handle_s { 147 uint32_t base; 148 uint32_t rdr_mask; 149 }; 150 151 int stm32_uart_init(struct stm32_uart_handle_s *huart, 152 uintptr_t base_addr, 153 const struct stm32_uart_init_s *init); 154 void stm32_uart_stop(uintptr_t base_addr); 155 int stm32_uart_putc(struct stm32_uart_handle_s *huart, int c); 156 int stm32_uart_flush(struct stm32_uart_handle_s *huart); 157 int stm32_uart_getc(struct stm32_uart_handle_s *huart); 158 159 #endif /* STM32_UART_H */ 160