1 /*
2  * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CORTEX_A5_H
8 #define CORTEX_A5_H
9 
10 #include <lib/utils_def.h>
11 
12 /*******************************************************************************
13  * Cortex-A8 midr with version/revision set to 0
14  ******************************************************************************/
15 #define CORTEX_A5_MIDR			U(0x410FC050)
16 
17 /*******************************************************************************
18  * CPU Auxiliary Control register specific definitions.
19  ******************************************************************************/
20 #define CORTEX_A5_ACTLR_SMP_BIT		(U(1) << 6)
21 
22 #endif /* CORTEX_A5_H */
23