1 /*
2  * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef CORTEX_A9_H
8 #define CORTEX_A9_H
9 
10 #include <lib/utils_def.h>
11 
12 /*******************************************************************************
13  * Cortex-A9 midr with version/revision set to 0
14  ******************************************************************************/
15 #define CORTEX_A9_MIDR			U(0x410FC090)
16 
17 /*******************************************************************************
18  * CPU Auxiliary Control register specific definitions.
19  ******************************************************************************/
20 #define CORTEX_A9_ACTLR_SMP_BIT		(U(1) << 6)
21 #define CORTEX_A9_ACTLR_FLZW_BIT	(U(1) << 3)
22 
23 /*******************************************************************************
24  * CPU Power Control Register
25  ******************************************************************************/
26 #define PCR		p15, 0, c15, c0, 0
27 
28 #ifndef __ASSEMBLER__
29 #include <arch_helpers.h>
30 DEFINE_COPROCR_RW_FUNCS(pcr, PCR)
31 #endif
32 
33 #endif /* CORTEX_A9_H */
34