1 /* 2 * Copyright (c) 2019-2022, ARM Limited. All rights reserved. 3 * Copyright (c) 2021-2022, NVIDIA Corporation. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef CORTEX_A78_AE_H 9 #define CORTEX_A78_AE_H 10 11 #include <cortex_a78.h> 12 13 #define CORTEX_A78_AE_MIDR U(0x410FD420) 14 15 /* Cortex-A78AE loop count for CVE-2022-23960 mitigation */ 16 #define CORTEX_A78_AE_BHB_LOOP_COUNT U(32) 17 18 /******************************************************************************* 19 * CPU Extended Control register specific definitions. 20 ******************************************************************************/ 21 #define CORTEX_A78_AE_CPUECTLR_EL1 CORTEX_A78_CPUECTLR_EL1 22 #define CORTEX_A78_AE_CPUECTLR_EL1_BIT_8 CORTEX_A78_CPUECTLR_EL1_BIT_8 23 24 /******************************************************************************* 25 * CPU Auxiliary Control register 2 specific definitions. 26 ******************************************************************************/ 27 #define CORTEX_A78_AE_ACTLR2_EL1 CORTEX_A78_ACTLR2_EL1 28 #define CORTEX_A78_AE_ACTLR2_EL1_BIT_0 CORTEX_A78_ACTLR2_EL1_BIT_0 29 #define CORTEX_A78_AE_ACTLR2_EL1_BIT_40 CORTEX_A78_ACTLR2_EL1_BIT_40 30 31 #endif /* CORTEX_A78_AE_H */ 32