1/*
2 * Copyright (c) 2020-2021, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6/dts-v1/;
7
8#define	AFF	00
9
10#include "fvp-defs.dtsi"
11#undef POST
12#define	POST \
13	};
14
15/ {
16	compatible = "arm,ffa-core-manifest-1.0";
17	#address-cells = <2>;
18	#size-cells = <1>;
19
20	attribute {
21		spmc_id = <0x8000>;
22		maj_ver = <0x1>;
23		min_ver = <0x1>;
24		exec_state = <0x0>;
25		load_address = <0x0 0x6000000>;
26		entrypoint = <0x0 0x6000000>;
27		binary_size = <0x80000>;
28	};
29
30	hypervisor {
31		compatible = "hafnium,hafnium";
32		vm1 {
33			is_ffa_partition;
34			debug_name = "op-tee";
35			load_address = <0x6280000>;
36			vcpu_count = <8>;
37			mem_size = <1048576>;
38		};
39	};
40
41	cpus {
42		#address-cells = <0x2>;
43		#size-cells = <0x0>;
44
45		CPU_0
46
47		/*
48		 * SPMC (Hafnium) requires secondary core nodes are declared
49		 * in descending order.
50		 */
51		CPU_7
52		CPU_6
53		CPU_5
54		CPU_4
55		CPU_3
56		CPU_2
57		CPU_1
58	};
59
60	memory@6000000 {
61		device_type = "memory";
62		reg = <0x0 0x6000000 0x2000000>; /* Trusted DRAM */
63	};
64};
65