1# 2# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9# Use the GICv3 driver on the FVP by default 10FVP_USE_GIC_DRIVER := FVP_GICV3 11 12# Default cluster count for FVP 13FVP_CLUSTER_COUNT := 2 14 15# Default number of CPUs per cluster on FVP 16FVP_MAX_CPUS_PER_CLUSTER := 4 17 18# Default number of threads per CPU on FVP 19FVP_MAX_PE_PER_CPU := 1 20 21# Disable redistributor frame of inactive/fused CPU cores by marking it as read 22# only; enable redistributor frames of all CPU cores by default. 23FVP_GICR_REGION_PROTECTION := 0 24 25FVP_DT_PREFIX := fvp-base-gicv3-psci 26 27# The FVP platform depends on this macro to build with correct GIC driver. 28$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 29 30# Pass FVP_CLUSTER_COUNT to the build system. 31$(eval $(call add_define,FVP_CLUSTER_COUNT)) 32 33# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 34$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 35 36# Pass FVP_MAX_PE_PER_CPU to the build system. 37$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 38 39# Pass FVP_GICR_REGION_PROTECTION to the build system. 40$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) 41 42# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 43# choose the CCI driver , else the CCN driver 44ifeq ($(FVP_CLUSTER_COUNT), 0) 45$(error "Incorrect cluster count specified for FVP port") 46else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 47FVP_INTERCONNECT_DRIVER := FVP_CCI 48else 49FVP_INTERCONNECT_DRIVER := FVP_CCN 50endif 51 52$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 53 54# Choose the GIC sources depending upon the how the FVP will be invoked 55ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 56 57# The GIC model (GIC-600 or GIC-500) will be detected at runtime 58GICV3_SUPPORT_GIC600 := 1 59GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 60 61# Include GICv3 driver files 62include drivers/arm/gic/v3/gicv3.mk 63 64FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 65 plat/common/plat_gicv3.c \ 66 plat/arm/common/arm_gicv3.c 67 68 ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 69 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 70 endif 71 72else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 73 74# No GICv4 extension 75GIC_ENABLE_V4_EXTN := 0 76$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 77 78# Include GICv2 driver files 79include drivers/arm/gic/v2/gicv2.mk 80 81FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 82 plat/common/plat_gicv2.c \ 83 plat/arm/common/arm_gicv2.c 84 85FVP_DT_PREFIX := fvp-base-gicv2-psci 86else 87$(error "Incorrect GIC driver chosen on FVP port") 88endif 89 90ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 91FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 92else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 93FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 94 plat/arm/common/arm_ccn.c 95else 96$(error "Incorrect CCN driver chosen on FVP port") 97endif 98 99FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 100 plat/arm/board/fvp/fvp_security.c \ 101 plat/arm/common/arm_tzc400.c 102 103 104PLAT_INCLUDES := -Iplat/arm/board/fvp/include 105 106 107PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 108 109FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 110 111ifeq (${ARCH}, aarch64) 112 113# select a different set of CPU files, depending on whether we compile for 114# hardware assisted coherency cores or not 115ifeq (${HW_ASSISTED_COHERENCY}, 0) 116# Cores used without DSU 117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 118 lib/cpus/aarch64/cortex_a53.S \ 119 lib/cpus/aarch64/cortex_a57.S \ 120 lib/cpus/aarch64/cortex_a72.S \ 121 lib/cpus/aarch64/cortex_a73.S 122else 123# Cores used with DSU only 124 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 125 # AArch64-only cores 126 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 127 lib/cpus/aarch64/cortex_a76ae.S \ 128 lib/cpus/aarch64/cortex_a77.S \ 129 lib/cpus/aarch64/cortex_a78.S \ 130 lib/cpus/aarch64/neoverse_n_common.S \ 131 lib/cpus/aarch64/neoverse_n1.S \ 132 lib/cpus/aarch64/neoverse_n2.S \ 133 lib/cpus/aarch64/neoverse_e1.S \ 134 lib/cpus/aarch64/neoverse_v1.S \ 135 lib/cpus/aarch64/neoverse_v2.S \ 136 lib/cpus/aarch64/cortex_a78_ae.S \ 137 lib/cpus/aarch64/cortex_a510.S \ 138 lib/cpus/aarch64/cortex_a710.S \ 139 lib/cpus/aarch64/cortex_a715.S \ 140 lib/cpus/aarch64/cortex_x3.S \ 141 lib/cpus/aarch64/cortex_a65.S \ 142 lib/cpus/aarch64/cortex_a65ae.S \ 143 lib/cpus/aarch64/cortex_a78c.S \ 144 lib/cpus/aarch64/cortex_hayes.S \ 145 lib/cpus/aarch64/cortex_hunter.S \ 146 lib/cpus/aarch64/cortex_hunter_elp_arm.S \ 147 lib/cpus/aarch64/cortex_x2.S \ 148 lib/cpus/aarch64/neoverse_poseidon.S 149 endif 150 # AArch64/AArch32 cores 151 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 152 lib/cpus/aarch64/cortex_a75.S 153endif 154 155else 156FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 157endif 158 159BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 160 drivers/arm/sp805/sp805.c \ 161 drivers/delay_timer/delay_timer.c \ 162 drivers/io/io_semihosting.c \ 163 lib/semihosting/semihosting.c \ 164 lib/semihosting/${ARCH}/semihosting_call.S \ 165 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 166 plat/arm/board/fvp/fvp_bl1_setup.c \ 167 plat/arm/board/fvp/fvp_err.c \ 168 plat/arm/board/fvp/fvp_io_storage.c \ 169 ${FVP_CPU_LIBS} \ 170 ${FVP_INTERCONNECT_SOURCES} 171 172ifeq (${USE_SP804_TIMER},1) 173BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 174else 175BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 176endif 177 178 179BL2_SOURCES += drivers/arm/sp805/sp805.c \ 180 drivers/io/io_semihosting.c \ 181 lib/utils/mem_region.c \ 182 lib/semihosting/semihosting.c \ 183 lib/semihosting/${ARCH}/semihosting_call.S \ 184 plat/arm/board/fvp/fvp_bl2_setup.c \ 185 plat/arm/board/fvp/fvp_err.c \ 186 plat/arm/board/fvp/fvp_io_storage.c \ 187 plat/arm/common/arm_nor_psci_mem_protect.c \ 188 ${FVP_SECURITY_SOURCES} 189 190 191ifeq (${COT_DESC_IN_DTB},1) 192BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 193endif 194 195ifeq (${ENABLE_RME},1) 196BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S 197BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \ 198 plat/arm/board/fvp/fvp_realm_attest_key.c 199endif 200 201ifeq (${BL2_AT_EL3},1) 202BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 203 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 204 ${FVP_CPU_LIBS} \ 205 ${FVP_INTERCONNECT_SOURCES} 206endif 207 208ifeq (${USE_SP804_TIMER},1) 209BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 210endif 211 212BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 213 ${FVP_SECURITY_SOURCES} 214 215ifeq (${USE_SP804_TIMER},1) 216BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 217endif 218 219BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 220 drivers/arm/smmu/smmu_v3.c \ 221 drivers/delay_timer/delay_timer.c \ 222 drivers/cfi/v2m/v2m_flash.c \ 223 lib/utils/mem_region.c \ 224 plat/arm/board/fvp/fvp_bl31_setup.c \ 225 plat/arm/board/fvp/fvp_console.c \ 226 plat/arm/board/fvp/fvp_pm.c \ 227 plat/arm/board/fvp/fvp_topology.c \ 228 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 229 plat/arm/common/arm_nor_psci_mem_protect.c \ 230 ${FVP_CPU_LIBS} \ 231 ${FVP_GIC_SOURCES} \ 232 ${FVP_INTERCONNECT_SOURCES} \ 233 ${FVP_SECURITY_SOURCES} 234 235# Support for fconf in BL31 236# Added separately from the above list for better readability 237ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) 238BL31_SOURCES += lib/fconf/fconf.c \ 239 lib/fconf/fconf_dyn_cfg_getter.c \ 240 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 241 242BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 243 244ifeq (${SEC_INT_DESC_IN_FCONF},1) 245BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 246endif 247 248endif 249 250ifeq (${USE_SP804_TIMER},1) 251BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 252else 253BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 254endif 255 256# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 257ifdef UNIX_MK 258FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 259FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 260 ${PLAT}_fw_config.dts \ 261 ${PLAT}_tb_fw_config.dts \ 262 ${PLAT}_soc_fw_config.dts \ 263 ${PLAT}_nt_fw_config.dts \ 264 ) 265 266FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 267FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 268FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 269FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 270 271ifeq (${SPD},tspd) 272FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 273FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 274 275# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 276$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 277endif 278 279ifeq (${SPD},spmd) 280 281ifeq ($(ARM_SPMC_MANIFEST_DTS),) 282ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 283endif 284 285FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 286FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 287 288# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 289$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 290endif 291 292# Add the FW_CONFIG to FIP and specify the same to certtool 293$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 294# Add the TB_FW_CONFIG to FIP and specify the same to certtool 295$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 296# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 297$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 298# Add the NT_FW_CONFIG to FIP and specify the same to certtool 299$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 300 301FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 302$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 303 304# Add the HW_CONFIG to FIP and specify the same to certtool 305$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 306endif 307 308# Enable Activity Monitor Unit extensions by default 309ENABLE_AMU := 1 310 311# Enable dynamic mitigation support by default 312DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 313 314ifeq (${ENABLE_AMU},1) 315BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 316 lib/cpus/aarch64/cpuamu_helpers.S 317 318ifeq (${HW_ASSISTED_COHERENCY}, 1) 319BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 320 lib/cpus/aarch64/neoverse_n1_pubsub.c 321endif 322endif 323 324ifeq (${RAS_EXTENSION},1) 325BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 326endif 327 328ifneq (${ENABLE_STACK_PROTECTOR},0) 329PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 330endif 331 332ifeq (${ARCH},aarch32) 333 NEED_BL32 := yes 334endif 335 336# Enable the dynamic translation tables library. 337ifeq ($(filter 1,${BL2_AT_EL3} ${ARM_XLAT_TABLES_LIB_V1}),) 338 ifeq (${ARCH},aarch32) 339 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 340 else # AArch64 341 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 342 endif 343endif 344 345ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 346 ifeq (${ARCH},aarch32) 347 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 348 else # AArch64 349 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 350 ifeq (${SPD},tspd) 351 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 352 endif 353 endif 354endif 355 356ifeq (${USE_DEBUGFS},1) 357 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 358endif 359 360# Add support for platform supplied linker script for BL31 build 361$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 362 363ifneq (${BL2_AT_EL3}, 0) 364 override BL1_SOURCES = 365endif 366 367# Include Measured Boot makefile before any Crypto library makefile. 368# Crypto library makefile may need default definitions of Measured Boot build 369# flags present in Measured Boot makefile. 370ifeq (${MEASURED_BOOT},1) 371 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk 372 $(info Including ${RSS_MEASURED_BOOT_MK}) 373 include ${RSS_MEASURED_BOOT_MK} 374 375 ifneq (${MBOOT_RSS_HASH_ALG}, sha256) 376 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 377 endif 378 379 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} 380 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} 381endif 382 383include plat/arm/board/common/board_common.mk 384include plat/arm/common/arm_common.mk 385 386ifeq (${MEASURED_BOOT},1) 387BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 388 plat/arm/board/fvp/fvp_bl1_measured_boot.c \ 389 lib/psa/measured_boot.c 390 391BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 392 plat/arm/board/fvp/fvp_bl2_measured_boot.c \ 393 lib/psa/measured_boot.c 394 395# Note that attestation code does not depend on measured boot interfaces per se, 396# but the two features go together - attestation without boot measurements is 397# pretty much pointless... 398BL31_SOURCES += lib/psa/delegated_attestation.c 399 400PLAT_INCLUDES += -Iinclude/lib/psa 401 402# RSS is not supported on FVP right now. Thus, we use the mocked version 403# of the provided PSA APIs. They return with success and hard-coded data. 404PLAT_RSS_NOT_SUPPORTED := 1 405 406# Even though RSS is not supported on FVP (see above), we support overriding 407# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building 408# the code to detect any build regressions. The resulting firmware will not be 409# functional. 410ifneq (${PLAT_RSS_NOT_SUPPORTED},1) 411 $(warning "RSS is not supported on FVP. The firmware will not be functional.") 412 include drivers/arm/rss/rss_comms.mk 413 BL1_SOURCES += ${RSS_COMMS_SOURCES} 414 BL2_SOURCES += ${RSS_COMMS_SOURCES} 415 BL31_SOURCES += ${RSS_COMMS_SOURCES} \ 416 lib/psa/delegated_attestation.c 417 418 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 419 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 420 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 421endif 422 423endif 424 425ifeq (${DRTM_SUPPORT}, 1) 426BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \ 427 plat/arm/board/fvp/fvp_drtm_dma_prot.c \ 428 plat/arm/board/fvp/fvp_drtm_err.c \ 429 plat/arm/board/fvp/fvp_drtm_measurement.c \ 430 plat/arm/board/fvp/fvp_drtm_stub.c \ 431 plat/arm/common/arm_dyn_cfg.c \ 432 plat/arm/board/fvp/fvp_err.c 433endif 434 435ifeq (${TRUSTED_BOARD_BOOT}, 1) 436BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 437BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 438 439# FVP being a development platform, enable capability to disable Authentication 440# dynamically if TRUSTED_BOARD_BOOT is set. 441DYN_DISABLE_AUTH := 1 442endif 443 444# enable trace buffer control registers access to NS by default 445ENABLE_TRBE_FOR_NS := 1 446 447# enable branch record buffer control registers access in NS by default 448# only enable for aarch64 449# do not enable when ENABLE_RME=1 450ifeq (${ARCH}, aarch64) 451ifeq (${ENABLE_RME},0) 452 ENABLE_BRBE_FOR_NS := 1 453endif 454endif 455 456# enable trace system registers access to NS by default 457ENABLE_SYS_REG_TRACE_FOR_NS := 1 458 459# enable trace filter control registers access to NS by default 460ENABLE_TRF_FOR_NS := 1 461 462ifeq (${SPMC_AT_EL3}, 1) 463PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c 464endif 465