1#
2# Copyright (c) 2020-2022, Arm Limited. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Making sure the Morello platform type is specified
8ifeq ($(filter ${TARGET_PLATFORM}, fvp soc),)
9	$(error TARGET_PLATFORM must be fvp or soc)
10endif
11
12MORELLO_BASE		:=	plat/arm/board/morello
13
14INTERCONNECT_SOURCES	:=	${MORELLO_BASE}/morello_interconnect.c
15
16PLAT_INCLUDES		:=	-I${MORELLO_BASE}/include
17
18MORELLO_CPU_SOURCES	:=	lib/cpus/aarch64/rainier.S
19
20# GIC-600 configuration
21GICV3_SUPPORT_GIC600	:=	1
22
23# Include GICv3 driver files
24include drivers/arm/gic/v3/gicv3.mk
25
26MORELLO_GIC_SOURCES	:=	${GICV3_SOURCES}			\
27				plat/common/plat_gicv3.c		\
28				plat/arm/common/arm_gicv3.c		\
29
30PLAT_BL_COMMON_SOURCES	:=	${MORELLO_BASE}/morello_plat.c		\
31				${MORELLO_BASE}/aarch64/morello_helper.S
32
33BL1_SOURCES		:=	${MORELLO_CPU_SOURCES}			\
34				${INTERCONNECT_SOURCES}			\
35				${MORELLO_BASE}/morello_err.c		\
36				${MORELLO_BASE}/morello_trusted_boot.c	\
37				${MORELLO_BASE}/morello_bl1_setup.c	\
38				drivers/arm/sbsa/sbsa.c
39
40BL2_SOURCES		:=	${MORELLO_BASE}/morello_security.c	\
41				${MORELLO_BASE}/morello_err.c		\
42				${MORELLO_BASE}/morello_trusted_boot.c	\
43				${MORELLO_BASE}/morello_bl2_setup.c	\
44				${MORELLO_BASE}/morello_image_load.c	\
45				lib/utils/mem_region.c			\
46				drivers/arm/css/sds/sds.c
47
48BL31_SOURCES		:=	${MORELLO_CPU_SOURCES}			\
49				${INTERCONNECT_SOURCES}			\
50				${MORELLO_GIC_SOURCES}			\
51				${MORELLO_BASE}/morello_bl31_setup.c	\
52				${MORELLO_BASE}/morello_topology.c	\
53				${MORELLO_BASE}/morello_security.c	\
54				drivers/arm/css/sds/sds.c
55
56FDT_SOURCES		+=	fdts/morello-${TARGET_PLATFORM}.dts		\
57				${MORELLO_BASE}/fdts/morello_fw_config.dts	\
58				${MORELLO_BASE}/fdts/morello_tb_fw_config.dts	\
59				${MORELLO_BASE}/fdts/morello_nt_fw_config.dts
60
61FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_fw_config.dtb
62TB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_tb_fw_config.dtb
63NT_FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_nt_fw_config.dtb
64
65# Add the FW_CONFIG to FIP and specify the same to certtool
66$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
67# Add the TB_FW_CONFIG to FIP and specify the same to certtool
68$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
69# Add the NT_FW_CONFIG to FIP and specify the same to certtool
70$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
71
72MORELLO_FW_NVCTR_VAL	:=	0
73TFW_NVCTR_VAL		:=	${MORELLO_FW_NVCTR_VAL}
74NTFW_NVCTR_VAL		:=	${MORELLO_FW_NVCTR_VAL}
75
76# TF-A not required to load the SCP Images
77override CSS_LOAD_SCP_IMAGES		:=	0
78
79override NEED_BL2U			:=	no
80
81# 32 bit mode not supported
82override CTX_INCLUDE_AARCH32_REGS	:=	0
83
84override ARM_PLAT_MT			:=	1
85
86override ARM_BL31_IN_DRAM		:=	1
87
88# Errata workarounds:
89ERRATA_N1_1868343			:=	1
90
91# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
92# SCP during power management operations and for SCP RAM Firmware transfer.
93CSS_USE_SCMI_SDS_DRIVER			:=	1
94
95# System coherency is managed in hardware
96HW_ASSISTED_COHERENCY			:=	1
97
98# When building for systems with hardware-assisted coherency, there's no need to
99# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
100USE_COHERENT_MEM			:=	0
101
102# Add TARGET_PLATFORM to differentiate between Morello FVP and Morello SoC platform
103$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
104
105# Add MORELLO_FW_NVCTR_VAL
106$(eval $(call add_define,MORELLO_FW_NVCTR_VAL))
107
108include plat/arm/common/arm_common.mk
109include plat/arm/css/common/css_common.mk
110include plat/arm/board/common/board_common.mk
111