1/*
2 * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <cpu_macros.S>
10#include <platform_def.h>
11
12	.weak	plat_secondary_cold_boot_setup
13	.weak	plat_get_my_entrypoint
14	.globl	css_calc_core_pos_swap_cluster
15	.weak	plat_is_my_cpu_primary
16
17	/* ---------------------------------------------------------------------
18	 * void plat_secondary_cold_boot_setup(void);
19	 * In the normal boot flow, cold-booting secondary
20	 * CPUs is not yet implemented and they panic.
21	 * ---------------------------------------------------------------------
22	 */
23func plat_secondary_cold_boot_setup
24	/* TODO: Implement secondary CPU cold boot setup on CSS platforms */
25cb_panic:
26	b	cb_panic
27endfunc plat_secondary_cold_boot_setup
28
29	/* ---------------------------------------------------------------------
30	 * uintptr_t plat_get_my_entrypoint (void);
31	 *
32	 * Main job of this routine is to distinguish between a cold and a warm
33	 * boot. On CSS platforms, this distinction is based on the contents of
34	 * the Trusted Mailbox. It is initialised to zero by the SCP before the
35	 * AP cores are released from reset. Therefore, a zero mailbox means
36	 * it's a cold reset.
37	 *
38	 * This functions returns the contents of the mailbox, i.e.:
39	 *  - 0 for a cold boot;
40	 *  - the warm boot entrypoint for a warm boot.
41	 * ---------------------------------------------------------------------
42	 */
43func plat_get_my_entrypoint
44	ldr	r0, =PLAT_ARM_TRUSTED_MAILBOX_BASE
45	ldr	r0, [r0]
46	bx	lr
47endfunc plat_get_my_entrypoint
48
49	/* -----------------------------------------------------------
50	 * unsigned int css_calc_core_pos_swap_cluster(u_register_t mpidr)
51	 * Utility function to calculate the core position by
52	 * swapping the cluster order. This is necessary in order to
53	 * match the format of the boot information passed by the SCP
54	 * and read in plat_is_my_cpu_primary below.
55	 * -----------------------------------------------------------
56	 */
57func css_calc_core_pos_swap_cluster
58	and	r1, r0, #MPIDR_CPU_MASK
59	and	r0, r0, #MPIDR_CLUSTER_MASK
60	eor	r0, r0, #(1 << MPIDR_AFFINITY_BITS)  // swap cluster order
61	add	r0, r1, r0, LSR #6
62	bx	lr
63endfunc css_calc_core_pos_swap_cluster
64
65	/* -----------------------------------------------------
66	 * unsigned int plat_is_my_cpu_primary (void);
67	 *
68	 * Find out whether the current cpu is the primary
69	 * cpu (applicable ony after a cold boot)
70	 * -----------------------------------------------------
71	 */
72#if CSS_USE_SCMI_SDS_DRIVER
73func plat_is_my_cpu_primary
74	mov	r10, lr
75	bl	plat_my_core_pos
76	mov	r4, r0
77	bl	sds_get_primary_cpu_id
78	/* Check for error */
79	mov	r1, #0xffffffff
80	cmp	r0, r1
81	beq	1f
82	cmp	r0, r4
83	moveq	r0, #1
84	movne	r0, #0
85	bx	r10
861:
87	no_ret	plat_panic_handler
88endfunc plat_is_my_cpu_primary
89#else
90func plat_is_my_cpu_primary
91	mov	r10, lr
92	bl	plat_my_core_pos
93	ldr	r1, =SCP_BOOT_CFG_ADDR
94	ldr	r1, [r1]
95	ubfx	r1, r1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \
96			#PLAT_CSS_PRIMARY_CPU_BIT_WIDTH
97	cmp	r0, r1
98	moveq	r0, #1
99	movne	r0, #0
100	bx	r10
101endfunc plat_is_my_cpu_primary
102#endif
103