1 /*
2  * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef HIKEY960_DEF_H
8 #define HIKEY960_DEF_H
9 
10 #include <common/tbbr/tbbr_img_def.h>
11 #include <plat/common/common_def.h>
12 
13 #define DDR_BASE			0x0
14 #define DDR_SIZE			0xE0000000
15 
16 #define DEVICE_BASE			0xE0000000
17 #define DEVICE_SIZE			0x20000000
18 
19 /* Memory location options for TSP */
20 #define HIKEY960_SRAM_ID	0
21 #define HIKEY960_DRAM_ID	1
22 
23 /*
24  * DDR for TEE (80MB from 0x3E00000-0x43000FFF) is divided into several
25  * regions:
26  *   - SPMC manifest (4KB at the top) used by SPMC_AT_EL3 and the TEE
27  *   - Datastore for SPMC_AT_EL3 (4MB at the top) used by BL31
28  *   - Secure DDR (default is the top 60MB) used by OP-TEE
29  *   - Non-secure DDR used by OP-TEE (shared memory and padding) (4MB)
30  *   - Secure DDR (4MB aligned on 4MB) for OP-TEE's "Secure Data Path" feature
31  *   - Non-secure DDR (8MB) reserved for OP-TEE's future use
32  */
33 #define DDR_SEC_SIZE			0x03C00000 /* reserve 60MB secure memory */
34 #define DDR_SEC_BASE			0x3F000000
35 #define DDR2_SEC_SIZE			0x00400000 /* SPMC_AT_EL3: 4MB for BL31 RAM2 */
36 #define DDR2_SEC_BASE			0x42C00000
37 #define DDR_SEC_CONFIG_SIZE		0x00001000 /* SPMC_AT_EL3: SPMC manifest */
38 #define DDR_SEC_CONFIG_BASE		0x43000000
39 
40 #define DDR_SDP_SIZE			0x00400000
41 #define DDR_SDP_BASE			(DDR_SEC_BASE - 0x400000 /* align */ - \
42 					DDR_SDP_SIZE)
43 
44 /*
45  * PL011 related constants
46  */
47 #define PL011_UART5_BASE		0xFDF05000
48 #define PL011_UART6_BASE		0xFFF32000
49 #define PL011_BAUDRATE			115200
50 #define PL011_UART_CLK_IN_HZ		19200000
51 
52 #define UFS_BASE			0
53 
54 #define HIKEY960_UFS_DESC_BASE		0x20000000
55 #define HIKEY960_UFS_DESC_SIZE		0x00200000	/* 2MB */
56 #define HIKEY960_UFS_DATA_BASE		0x10000000
57 #define HIKEY960_UFS_DATA_SIZE		0x0A000000	/* 160MB */
58 
59 #if defined(SPMC_AT_EL3)
60 /*
61  * Number of Secure Partitions supported.
62  * SPMC at EL3, uses this count to configure the maximum number of supported
63  * secure partitions.
64  */
65 #define SECURE_PARTITION_COUNT      1
66 
67 /*
68  * Number of Nwld Partitions supported.
69  * SPMC at EL3, uses this count to configure the maximum number of supported
70  * nwld partitions.
71  */
72 #define NS_PARTITION_COUNT      1
73 /*
74  * Number of Logical Partitions supported.
75  * SPMC at EL3, uses this count to configure the maximum number of supported
76  * logical partitions.
77  */
78 #define MAX_EL3_LP_DESCS_COUNT		1
79 
80 #endif /* SPMC_AT_EL3 */
81 
82 #endif /* HIKEY960_DEF_H */
83