1/*
2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#include <asm_macros.S>
7#include <platform_def.h>
8
9	.globl	plat_my_core_pos
10	.globl	poplar_calc_core_pos
11	.globl	plat_crash_console_init
12	.globl	plat_crash_console_putc
13	.globl	plat_crash_console_flush
14	.globl	platform_mem_init
15
16	/* -----------------------------------------------------
17	 *  unsigned int plat_my_core_pos(void)
18	 *  This function uses poplar_calc_core_pos()
19	 *  definition to get the index of the calling CPU.
20	 * -----------------------------------------------------
21	 */
22func plat_my_core_pos
23	mrs	x0, mpidr_el1
24	b	poplar_calc_core_pos
25endfunc plat_my_core_pos
26
27	/* -----------------------------------------------------
28	 *  unsigned int poplar_calc_core_pos(u_register_t mpidr)
29	 *  Helper function to calculate the core position.
30	 *  With this function: CorePos = (ClusterId * 4) +
31	 *  				  CoreId
32	 * -----------------------------------------------------
33	 */
34func poplar_calc_core_pos
35	and	x1, x0, #MPIDR_CPU_MASK
36	and	x0, x0, #MPIDR_CLUSTER_MASK
37	add	x0, x1, x0, LSR #6
38	ret
39endfunc poplar_calc_core_pos
40
41	/* ---------------------------------------------
42	 * int plat_crash_console_init(void)
43	 * Function to initialize the crash console
44	 * without a C Runtime to print crash report.
45	 * Clobber list : x0 - x4
46	 * ---------------------------------------------
47	 */
48func plat_crash_console_init
49	mov_imm	x0, POPLAR_CRASH_UART_BASE
50	mov_imm	x1, POPLAR_CRASH_UART_CLK_IN_HZ
51	mov_imm	x2, POPLAR_CONSOLE_BAUDRATE
52	b	console_pl011_core_init
53endfunc plat_crash_console_init
54
55	/* ---------------------------------------------
56	 * int plat_crash_console_putc(int c)
57	 * Function to print a character on the crash
58	 * console without a C Runtime.
59	 * Clobber list : x1, x2
60	 * ---------------------------------------------
61	 */
62func plat_crash_console_putc
63	mov_imm	x1, POPLAR_CRASH_UART_BASE
64	b	console_pl011_core_putc
65endfunc plat_crash_console_putc
66
67	/* ---------------------------------------------
68	 * void plat_crash_console_flush()
69	 * Function to force a write of all buffered
70	 * data that hasn't been output.
71	 * Out : void.
72	 * Clobber list : r0
73	 * ---------------------------------------------
74	 */
75func plat_crash_console_flush
76	mov_imm	x0, POPLAR_CRASH_UART_BASE
77	b	console_pl011_core_flush
78endfunc plat_crash_console_flush
79
80	/* ---------------------------------------------------------------------
81	 * We don't need to carry out any memory initialization on ARM
82	 * platforms. The Secure RAM is accessible straight away.
83	 * ---------------------------------------------------------------------
84	 */
85func platform_mem_init
86	ret
87endfunc platform_mem_init
88