1 /*
2 * Copyright (c) 2019-2022 NXP. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <common/debug.h>
8 #include <lib/mmio.h>
9
10 #include <imx8m_caam.h>
11
12 #define HAB_JR0_DID U(0x8011)
13
imx8m_caam_init(void)14 void imx8m_caam_init(void)
15 {
16 uint32_t sm_cmd;
17
18 /* Dealloc part 0 and 2 with current DID */
19 sm_cmd = (0 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART);
20 mmio_write_32(SM_CMD, sm_cmd);
21
22 sm_cmd = (2 << SMC_PART_SHIFT | SMC_CMD_DEALLOC_PART);
23 mmio_write_32(SM_CMD, sm_cmd);
24
25 /* config CAAM JRaMID set MID to Cortex A */
26 if (mmio_read_32(CAAM_JR0MID) == HAB_JR0_DID) {
27 NOTICE("Do not release JR0 to NS as it can be used by HAB\n");
28 } else {
29 mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
30 }
31
32 mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);
33 mmio_write_32(CAAM_JR2MID, CAAM_NS_MID);
34
35 /* Alloc partition 0 writing SMPO and SMAGs */
36 mmio_write_32(SM_P0_PERM, 0xff);
37 mmio_write_32(SM_P0_SMAG2, 0xffffffff);
38 mmio_write_32(SM_P0_SMAG1, 0xffffffff);
39
40 /* Allocate page 0 and 1 to partition 0 with DID set */
41 sm_cmd = (0 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT |
42 SMC_CMD_ALLOC_PAGE);
43 mmio_write_32(SM_CMD, sm_cmd);
44
45 sm_cmd = (1 << SMC_PAGE_SHIFT | 0 << SMC_PART_SHIFT |
46 SMC_CMD_ALLOC_PAGE);
47 mmio_write_32(SM_CMD, sm_cmd);
48 }
49