1# 2# Copyright 2019-2022 NXP 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_INCLUDES := -Iplat/imx/common/include \ 8 -Iplat/imx/imx8m/include \ 9 -Iplat/imx/imx8m/imx8mp/include \ 10 -Idrivers/imx/usdhc \ 11 -Iinclude/common/tbbr 12# Translation tables library 13include lib/xlat_tables_v2/xlat_tables.mk 14 15# Include GICv3 driver files 16include drivers/arm/gic/v3/gicv3.mk 17 18IMX_DRAM_SOURCES := plat/imx/imx8m/ddr/dram.c \ 19 plat/imx/imx8m/ddr/clock.c \ 20 plat/imx/imx8m/ddr/dram_retention.c \ 21 plat/imx/imx8m/ddr/ddr4_dvfs.c \ 22 plat/imx/imx8m/ddr/lpddr4_dvfs.c 23 24IMX_GIC_SOURCES := ${GICV3_SOURCES} \ 25 plat/common/plat_gicv3.c \ 26 plat/common/plat_psci_common.c \ 27 plat/imx/common/plat_imx8_gic.c 28 29BL31_SOURCES += plat/imx/common/imx8_helpers.S \ 30 plat/imx/imx8m/gpc_common.c \ 31 plat/imx/imx8m/imx_hab.c \ 32 plat/imx/imx8m/imx_aipstz.c \ 33 plat/imx/imx8m/imx_rdc.c \ 34 plat/imx/imx8m/imx8m_caam.c \ 35 plat/imx/imx8m/imx8m_csu.c \ 36 plat/imx/imx8m/imx8m_psci_common.c \ 37 plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c \ 38 plat/imx/imx8m/imx8mp/imx8mp_psci.c \ 39 plat/imx/imx8m/imx8mp/gpc.c \ 40 plat/imx/common/imx8_topology.c \ 41 plat/imx/common/imx_sip_handler.c \ 42 plat/imx/common/imx_sip_svc.c \ 43 plat/imx/common/imx_uart_console.S \ 44 lib/cpus/aarch64/cortex_a53.S \ 45 drivers/arm/tzc/tzc380.c \ 46 drivers/delay_timer/delay_timer.c \ 47 drivers/delay_timer/generic_delay_timer.c \ 48 ${IMX_DRAM_SOURCES} \ 49 ${IMX_GIC_SOURCES} \ 50 ${XLAT_TABLES_LIB_SRCS} 51 52ifeq (${NEED_BL2},yes) 53BL2_SOURCES += common/desc_image_load.c \ 54 plat/imx/common/imx8_helpers.S \ 55 plat/imx/common/imx_uart_console.S \ 56 plat/imx/imx8m/imx8mp/imx8mp_bl2_el3_setup.c \ 57 plat/imx/imx8m/imx8mp/gpc.c \ 58 plat/imx/imx8m/imx_aipstz.c \ 59 plat/imx/imx8m/imx_rdc.c \ 60 plat/imx/imx8m/imx8m_caam.c \ 61 plat/common/plat_psci_common.c \ 62 lib/cpus/aarch64/cortex_a53.S \ 63 drivers/arm/tzc/tzc380.c \ 64 drivers/delay_timer/delay_timer.c \ 65 drivers/delay_timer/generic_delay_timer.c \ 66 ${PLAT_GIC_SOURCES} \ 67 ${PLAT_DRAM_SOURCES} \ 68 ${XLAT_TABLES_LIB_SRCS} \ 69 drivers/mmc/mmc.c \ 70 drivers/io/io_block.c \ 71 drivers/io/io_fip.c \ 72 drivers/io/io_memmap.c \ 73 drivers/io/io_storage.c \ 74 drivers/imx/usdhc/imx_usdhc.c \ 75 plat/imx/imx8m/imx8mp/imx8mp_bl2_mem_params_desc.c \ 76 plat/imx/common/imx_io_storage.c \ 77 plat/imx/imx8m/imx8m_image_load.c \ 78 lib/optee/optee_utils.c 79endif 80 81# Add the build options to pack BLx images and kernel device tree 82# in the FIP if the platform requires. 83ifneq ($(BL2),) 84RESET_TO_BL31 := 0 85$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert)) 86endif 87ifneq ($(BL32_EXTRA1),) 88$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1)) 89endif 90ifneq ($(BL32_EXTRA2),) 91$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2)) 92endif 93ifneq ($(HW_CONFIG),) 94$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config)) 95endif 96 97ifeq (${NEED_BL2},yes) 98$(eval $(call add_define,NEED_BL2)) 99LOAD_IMAGE_V2 := 1 100# Non-TF Boot ROM 101BL2_AT_EL3 := 1 102endif 103 104ifneq (${TRUSTED_BOARD_BOOT},0) 105 106include drivers/auth/mbedtls/mbedtls_crypto.mk 107include drivers/auth/mbedtls/mbedtls_x509.mk 108 109AUTH_SOURCES := drivers/auth/auth_mod.c \ 110 drivers/auth/crypto_mod.c \ 111 drivers/auth/img_parser_mod.c \ 112 drivers/auth/tbbr/tbbr_cot_common.c \ 113 drivers/auth/tbbr/tbbr_cot_bl2.c 114 115BL2_SOURCES += ${AUTH_SOURCES} \ 116 plat/common/tbbr/plat_tbbr.c \ 117 plat/imx/imx8m/imx8mp/imx8mp_trusted_boot.c \ 118 plat/imx/imx8m/imx8mp/imx8mp_rotpk.S 119 120ROT_KEY = $(BUILD_PLAT)/rot_key.pem 121ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 122 123$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 124$(eval $(call MAKE_LIB_DIRS)) 125 126$(BUILD_PLAT)/bl2/imx8mp_rotpk.o: $(ROTPK_HASH) 127 128certificates: $(ROT_KEY) 129 130$(ROT_KEY): | $(BUILD_PLAT) 131 @echo " OPENSSL $@" 132 @if [ ! -f $(ROT_KEY) ]; then \ 133 ${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null; \ 134 fi 135 136$(ROTPK_HASH): $(ROT_KEY) 137 @echo " OPENSSL $@" 138 $(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 139 ${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null 140endif 141 142ENABLE_PIE := 1 143USE_COHERENT_MEM := 1 144RESET_TO_BL31 := 1 145A53_DISABLE_NON_TEMPORAL_HINT := 0 146 147ERRATA_A53_835769 := 1 148ERRATA_A53_843419 := 1 149ERRATA_A53_855873 := 1 150 151BL32_BASE ?= 0x56000000 152$(eval $(call add_define,BL32_BASE)) 153 154BL32_SIZE ?= 0x2000000 155$(eval $(call add_define,BL32_SIZE)) 156 157IMX_BOOT_UART_BASE ?= 0x30890000 158$(eval $(call add_define,IMX_BOOT_UART_BASE)) 159 160EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT) 161ifeq (${SDEI_SUPPORT}, 1) 162BL31_SOURCES += plat/imx/common/imx_ehf.c \ 163 plat/imx/common/imx_sdei.c 164endif 165 166ifeq (${SPD},trusty) 167 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 168endif 169