1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:	BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 #include <plat_marvell.h>
8 
9 /* MMU entry for internal (register) space access */
10 #define MAP_DEVICE0	MAP_REGION_FLAT(DEVICE0_BASE,			\
11 					DEVICE0_SIZE,			\
12 					MT_DEVICE | MT_RW | MT_SECURE)
13 
14 /*
15  * Table of regions for various BL stages to map using the MMU.
16  */
17 #if IMAGE_BL1
18 const mmap_region_t plat_marvell_mmap[] = {
19 	MARVELL_MAP_SHARED_RAM,
20 	MAP_DEVICE0,
21 	{0}
22 };
23 #endif
24 #if IMAGE_BL2
25 const mmap_region_t plat_marvell_mmap[] = {
26 	MARVELL_MAP_SHARED_RAM,
27 	MAP_DEVICE0,
28 	MARVELL_MAP_DRAM,
29 	{0}
30 };
31 #endif
32 #if IMAGE_BL2U
33 const mmap_region_t plat_marvell_mmap[] = {
34 	MAP_DEVICE0,
35 	{0}
36 };
37 #endif
38 #if IMAGE_BL31
39 const mmap_region_t plat_marvell_mmap[] = {
40 	MARVELL_MAP_SHARED_RAM,
41 	MAP_DEVICE0,
42 	MARVELL_MAP_DRAM,
43 	{0}
44 };
45 #endif
46 #if IMAGE_BL32
47 const mmap_region_t plat_marvell_mmap[] = {
48 	MAP_DEVICE0,
49 	{0}
50 };
51 #endif
52 
53 MARVELL_CASSERT_MMAP;
54