1 /*
2  * Copyright (c) 2021-2022, MediaTek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef PMIC_WRAP_INIT_H
8 #define PMIC_WRAP_INIT_H
9 
10 #include <stdint.h>
11 
12 #include "platform_def.h"
13 #include <pmic_wrap_init_common.h>
14 
15 static struct mt8186_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
16 
17 /* timeout setting */
18 enum {
19 	TIMEOUT_RESET       = 50,	/* us */
20 	TIMEOUT_READ        = 50,	/* us */
21 	TIMEOUT_WAIT_IDLE   = 50	/* us */
22 };
23 
24 /* PMIC_WRAP registers */
25 struct mt8186_pmic_wrap_regs {
26 	uint32_t unused[776];
27 	uint32_t wacs2_cmd;
28 	uint32_t wacs2_rdata;
29 	uint32_t wacs2_vldclr;
30 };
31 
32 enum {
33 	RDATA_WACS_RDATA_SHIFT = 0,
34 	RDATA_WACS_FSM_SHIFT = 16,
35 	RDATA_WACS_REQ_SHIFT = 19,
36 	RDATA_SYNC_IDLE_SHIFT = 20,
37 	RDATA_INIT_DONE_SHIFT = 22,
38 	RDATA_SYS_IDLE_SHIFT = 23,
39 };
40 
41 enum {
42 	RDATA_WACS_RDATA_MASK = 0xffff,
43 	RDATA_WACS_FSM_MASK = 0x7,
44 	RDATA_WACS_REQ_MASK = 0x1,
45 	RDATA_SYNC_IDLE_MASK = 0x1,
46 	RDATA_INIT_DONE_MASK = 0x1,
47 	RDATA_SYS_IDLE_MASK = 0x1,
48 };
49 
50 /* WACS_FSM */
51 enum {
52 	WACS_FSM_IDLE            = 0x00,
53 	WACS_FSM_REQ             = 0x02,
54 	WACS_FSM_WFDLE           = 0x04,
55 	WACS_FSM_WFVLDCLR        = 0x06,
56 	WACS_INIT_DONE           = 0x01,
57 	WACS_SYNC_IDLE           = 0x01,
58 	WACS_SYNC_BUSY           = 0x00
59 };
60 
61 #endif /* PMIC_WRAP_INIT_H */
62