1 /*
2 * Copyright (c) 2020, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef MT_SPM_H
8 #define MT_SPM_H
9
10 #include <lib/bakery_lock.h>
11 #include <lib/spinlock.h>
12
13 #include <plat_mtk_lpm.h>
14
15 /*
16 * ARM v8.2, the cache will turn off automatically when cpu
17 * power down. So, there is no doubt to use the spin_lock here
18 */
19 #if !HW_ASSISTED_COHERENCY
20 #define MT_SPM_USING_BAKERY_LOCK
21 #endif
22
23 #ifdef MT_SPM_USING_BAKERY_LOCK
24 DECLARE_BAKERY_LOCK(spm_lock);
25 #define plat_spm_lock() bakery_lock_get(&spm_lock)
26 #define plat_spm_unlock() bakery_lock_release(&spm_lock)
27 #else
28 extern spinlock_t spm_lock;
29 #define plat_spm_lock() spin_lock(&spm_lock)
30 #define plat_spm_unlock() spin_unlock(&spm_lock)
31 #endif
32
33 #define MT_SPM_USING_SRCLKEN_RC
34
35 /* spm extern operand definition */
36 #define MT_SPM_EX_OP_CLR_26M_RECORD (1U << 0)
37 #define MT_SPM_EX_OP_SET_WDT (1U << 1)
38 #define MT_SPM_EX_OP_NON_GENERIC_RESOURCE_REQ (1U << 2)
39 #define MT_SPM_EX_OP_SET_SUSPEND_MODE (1U << 3)
40 #define MT_SPM_EX_OP_SET_IS_ADSP (1U << 4)
41 #define MT_SPM_EX_OP_SRCLKEN_RC_BBLPM (1U << 5)
42 #define MT_SPM_EX_OP_HW_S1_DETECT (1U << 6)
43
44 typedef enum {
45 WR_NONE = 0,
46 WR_UART_BUSY = 1,
47 WR_ABORT = 2,
48 WR_PCM_TIMER = 3,
49 WR_WAKE_SRC = 4,
50 WR_DVFSRC = 5,
51 WR_TWAM = 6,
52 WR_PMSR = 7,
53 WR_SPM_ACK_CHK = 8,
54 WR_UNKNOWN = 9,
55 } wake_reason_t;
56
spm_lock_get(void)57 static inline void spm_lock_get(void)
58 {
59 plat_spm_lock();
60 }
61
spm_lock_release(void)62 static inline void spm_lock_release(void)
63 {
64 plat_spm_unlock();
65 }
66
67 extern void spm_boot_init(void);
68 #endif /* MT_SPM_H */
69