1 
2 /*
3  * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <platform_def.h>
9 
10 #include <arch_helpers.h>
11 #include <common/bl_common.h>
12 #include <lib/xlat_tables/xlat_tables_v2.h>
13 
14 #include <plat/common/platform.h>
15 #include "qemu_private.h"
16 
17 #define MAP_DEVICE0	MAP_REGION_FLAT(DEVICE0_BASE,			\
18 					DEVICE0_SIZE,			\
19 					MT_DEVICE | MT_RW | MT_SECURE)
20 
21 #ifdef DEVICE1_BASE
22 #define MAP_DEVICE1	MAP_REGION_FLAT(DEVICE1_BASE,			\
23 					DEVICE1_SIZE,			\
24 					MT_DEVICE | MT_RW | MT_SECURE)
25 #endif
26 
27 #ifdef DEVICE2_BASE
28 #define MAP_DEVICE2	MAP_REGION_FLAT(DEVICE2_BASE,			\
29 					DEVICE2_SIZE,			\
30 					MT_DEVICE | MT_RW | MT_SECURE)
31 #endif
32 
33 #define MAP_SHARED_RAM	MAP_REGION_FLAT(SHARED_RAM_BASE,		\
34 					SHARED_RAM_SIZE,		\
35 					MT_DEVICE  | MT_RW | MT_SECURE)
36 
37 #define MAP_BL32_MEM	MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE,	\
38 					MT_MEMORY | MT_RW | MT_SECURE)
39 
40 #define MAP_NS_DRAM0	MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE,	\
41 					MT_MEMORY | MT_RW | MT_NS)
42 
43 #define MAP_FLASH0	MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
44 					MT_MEMORY | MT_RO | MT_SECURE)
45 
46 #define MAP_FLASH1	MAP_REGION_FLAT(QEMU_FLASH1_BASE, QEMU_FLASH1_SIZE, \
47 					MT_MEMORY | MT_RO | MT_SECURE)
48 
49 /*
50  * Table of regions for various BL stages to map using the MMU.
51  * This doesn't include TZRAM as the 'mem_layout' argument passed to
52  * arm_configure_mmu_elx() will give the available subset of that,
53  */
54 #ifdef IMAGE_BL1
55 static const mmap_region_t plat_qemu_mmap[] = {
56 	MAP_FLASH0,
57 	MAP_FLASH1,
58 	MAP_SHARED_RAM,
59 	MAP_DEVICE0,
60 #ifdef MAP_DEVICE1
61 	MAP_DEVICE1,
62 #endif
63 #ifdef MAP_DEVICE2
64 	MAP_DEVICE2,
65 #endif
66 	{0}
67 };
68 #endif
69 #ifdef IMAGE_BL2
70 static const mmap_region_t plat_qemu_mmap[] = {
71 	MAP_FLASH0,
72 	MAP_FLASH1,
73 	MAP_SHARED_RAM,
74 	MAP_DEVICE0,
75 #ifdef MAP_DEVICE1
76 	MAP_DEVICE1,
77 #endif
78 #ifdef MAP_DEVICE2
79 	MAP_DEVICE2,
80 #endif
81 	MAP_NS_DRAM0,
82 #if SPM_MM
83 	QEMU_SP_IMAGE_MMAP,
84 #else
85 	MAP_BL32_MEM,
86 #endif
87 	{0}
88 };
89 #endif
90 #ifdef IMAGE_BL31
91 static const mmap_region_t plat_qemu_mmap[] = {
92 	MAP_SHARED_RAM,
93 	MAP_DEVICE0,
94 #ifdef MAP_DEVICE1
95 	MAP_DEVICE1,
96 #endif
97 #ifdef MAP_DEVICE2
98 	MAP_DEVICE2,
99 #endif
100 #if SPM_MM
101 	MAP_NS_DRAM0,
102 	QEMU_SPM_BUF_EL3_MMAP,
103 #else
104 	MAP_BL32_MEM,
105 #endif
106 	{0}
107 };
108 #endif
109 #ifdef IMAGE_BL32
110 static const mmap_region_t plat_qemu_mmap[] = {
111 	MAP_SHARED_RAM,
112 	MAP_DEVICE0,
113 #ifdef MAP_DEVICE1
114 	MAP_DEVICE1,
115 #endif
116 #ifdef MAP_DEVICE2
117 	MAP_DEVICE2,
118 #endif
119 	{0}
120 };
121 #endif
122 
123 /*******************************************************************************
124  * Macro generating the code for the function setting up the pagetables as per
125  * the platform memory map & initialize the mmu, for the given exception level
126  ******************************************************************************/
127 
128 #define DEFINE_CONFIGURE_MMU_EL(_el)					\
129 	void qemu_configure_mmu_##_el(unsigned long total_base,	\
130 				   unsigned long total_size,		\
131 				   unsigned long code_start,		\
132 				   unsigned long code_limit,		\
133 				   unsigned long ro_start,		\
134 				   unsigned long ro_limit,		\
135 				   unsigned long coh_start,		\
136 				   unsigned long coh_limit)		\
137 	{								\
138 		mmap_add_region(total_base, total_base,			\
139 				total_size,				\
140 				MT_MEMORY | MT_RW | MT_SECURE);		\
141 		mmap_add_region(code_start, code_start,			\
142 				code_limit - code_start,		\
143 				MT_CODE | MT_SECURE);			\
144 		mmap_add_region(ro_start, ro_start,			\
145 				ro_limit - ro_start,			\
146 				MT_RO_DATA | MT_SECURE);		\
147 		mmap_add_region(coh_start, coh_start,			\
148 				coh_limit - coh_start,			\
149 				MT_DEVICE | MT_RW | MT_SECURE);		\
150 		mmap_add(plat_qemu_mmap);				\
151 		init_xlat_tables();					\
152 									\
153 		enable_mmu_##_el(0);					\
154 	}
155 
156 /* Define EL1 and EL3 variants of the function initialising the MMU */
157 #ifdef __aarch64__
158 DEFINE_CONFIGURE_MMU_EL(el1)
DEFINE_CONFIGURE_MMU_EL(el3)159 DEFINE_CONFIGURE_MMU_EL(el3)
160 #else
161 DEFINE_CONFIGURE_MMU_EL(svc_mon)
162 #endif
163 
164 #if MEASURED_BOOT || TRUSTED_BOARD_BOOT
165 int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
166 {
167 	return get_mbedtls_heap_helper(heap_addr, heap_size);
168 }
169 #endif
170