1 /*
2 * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <libfdt.h>
8
9 #include <platform_def.h>
10
11 #include <common/bl_common.h>
12 #include <common/debug.h>
13 #include <drivers/arm/gicv2.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <lib/utils.h>
16 #include <plat/common/platform.h>
17
18 struct stm32_gic_instance {
19 uint32_t cells;
20 uint32_t phandle_node;
21 };
22
23 /******************************************************************************
24 * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
25 * interrupts.
26 *****************************************************************************/
27 static const interrupt_prop_t stm32mp1_interrupt_props[] = {
28 PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0),
29 PLATFORM_G0_PROPS(GICV2_INTR_GROUP0)
30 };
31
32 /* Fix target_mask_array as secondary core is not able to initialize it */
33 static unsigned int target_mask_array[PLATFORM_CORE_COUNT] = {1, 2};
34
35 static gicv2_driver_data_t platform_gic_data = {
36 .interrupt_props = stm32mp1_interrupt_props,
37 .interrupt_props_num = ARRAY_SIZE(stm32mp1_interrupt_props),
38 .target_masks = target_mask_array,
39 .target_masks_num = ARRAY_SIZE(target_mask_array),
40 };
41
42 static struct stm32_gic_instance stm32_gic;
43
stm32mp1_gic_init(void)44 void stm32mp1_gic_init(void)
45 {
46 int node;
47 void *fdt;
48 const fdt32_t *cuint;
49 struct dt_node_info dt_gic;
50
51 if (fdt_get_address(&fdt) == 0) {
52 panic();
53 }
54
55 node = dt_get_node(&dt_gic, -1, "arm,cortex-a7-gic");
56 if (node < 0) {
57 panic();
58 }
59
60 platform_gic_data.gicd_base = dt_gic.base;
61
62 cuint = fdt_getprop(fdt, node, "reg", NULL);
63 if (cuint == NULL) {
64 panic();
65 }
66
67 platform_gic_data.gicc_base = fdt32_to_cpu(*(cuint + 2));
68
69 cuint = fdt_getprop(fdt, node, "#interrupt-cells", NULL);
70 if (cuint == NULL) {
71 panic();
72 }
73
74 stm32_gic.cells = fdt32_to_cpu(*cuint);
75
76 stm32_gic.phandle_node = fdt_get_phandle(fdt, node);
77 if (stm32_gic.phandle_node == 0U) {
78 panic();
79 }
80
81 gicv2_driver_init(&platform_gic_data);
82 gicv2_distif_init();
83
84 stm32mp1_gic_pcpu_init();
85 }
86
stm32mp1_gic_pcpu_init(void)87 void stm32mp1_gic_pcpu_init(void)
88 {
89 gicv2_pcpu_distif_init();
90 gicv2_set_pe_target_mask(plat_my_core_pos());
91 gicv2_cpuif_enable();
92 }
93