1# Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
2#
3# SPDX-License-Identifier: BSD-3-Clause
4
5override PROGRAMMABLE_RESET_ADDRESS := 1
6PSCI_EXTENDED_STATE_ID := 1
7A53_DISABLE_NON_TEMPORAL_HINT := 0
8SEPARATE_CODE_AND_RODATA := 1
9override RESET_TO_BL31 := 1
10PL011_GENERIC_UART := 1
11IPI_CRC_CHECK := 0
12HARDEN_SLS_ALL := 0
13
14# A72 Erratum for SoC
15ERRATA_A72_859971 := 1
16ERRATA_A72_1319367 := 1
17
18ifdef VERSAL_ATF_MEM_BASE
19    $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
20
21    ifndef VERSAL_ATF_MEM_SIZE
22        $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
23    endif
24    $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
25
26    ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
27        $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
28    endif
29endif
30
31ifdef VERSAL_BL32_MEM_BASE
32    $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
33
34    ifndef VERSAL_BL32_MEM_SIZE
35        $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
36    endif
37    $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
38endif
39
40ifdef IPI_CRC_CHECK
41    $(eval $(call add_define,IPI_CRC_CHECK))
42endif
43
44VERSAL_PLATFORM ?= silicon
45$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
46
47PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
48				-Iplat/xilinx/common/include/			\
49				-Iplat/xilinx/common/ipi_mailbox_service/	\
50				-Iplat/xilinx/versal/include/			\
51				-Iplat/xilinx/versal/pm_service/
52
53# Include GICv3 driver files
54include drivers/arm/gic/v3/gicv3.mk
55
56PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
57				lib/xlat_tables/aarch64/xlat_tables.c		\
58				drivers/arm/dcc/dcc_console.c			\
59				drivers/delay_timer/delay_timer.c		\
60				drivers/delay_timer/generic_delay_timer.c	\
61				${GICV3_SOURCES}				\
62				drivers/arm/pl011/aarch64/pl011_console.S	\
63				plat/common/aarch64/crash_console_helpers.S	\
64				plat/arm/common/arm_cci.c			\
65				plat/arm/common/arm_common.c			\
66				plat/common/plat_gicv3.c			\
67				plat/xilinx/versal/aarch64/versal_helpers.S	\
68				plat/xilinx/versal/aarch64/versal_common.c
69
70VERSAL_CONSOLE	?=	pl011
71ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc))
72else
73  $(error "Please define VERSAL_CONSOLE")
74endif
75
76$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
77
78BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
79				lib/cpus/aarch64/cortex_a72.S			\
80				plat/common/plat_psci_common.c			\
81				plat/xilinx/common/ipi.c			\
82				plat/xilinx/common/plat_startup.c		\
83				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
84				plat/xilinx/common/pm_service/pm_ipi.c		\
85				plat/xilinx/versal/bl31_versal_setup.c		\
86				plat/xilinx/versal/plat_psci.c			\
87				plat/xilinx/versal/plat_versal.c		\
88				plat/xilinx/versal/plat_topology.c		\
89				plat/xilinx/versal/sip_svc_setup.c		\
90				plat/xilinx/versal/versal_gicv3.c		\
91				plat/xilinx/versal/versal_ipi.c			\
92				plat/xilinx/versal/pm_service/pm_svc_main.c	\
93				plat/xilinx/versal/pm_service/pm_api_sys.c	\
94				plat/xilinx/versal/pm_service/pm_client.c
95
96ifeq ($(HARDEN_SLS_ALL), 1)
97TF_CFLAGS_aarch64      +=      -mharden-sls=all
98endif
99