1 /* 2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3 * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. 4 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef PLAT_PRIVATE_H 10 #define PLAT_PRIVATE_H 11 12 #include <bl31/interrupt_mgmt.h> 13 #include <lib/xlat_tables/xlat_tables_v2.h> 14 15 typedef struct versal_intr_info_type_el3 { 16 uint32_t id; 17 interrupt_type_handler_t handler; 18 } versal_intr_info_type_el3_t; 19 20 void versal_net_config_setup(void); 21 22 const mmap_region_t *plat_versal_net_get_mmap(void); 23 24 void plat_versal_net_gic_driver_init(void); 25 void plat_versal_net_gic_init(void); 26 void plat_versal_net_gic_cpuif_enable(void); 27 void plat_versal_net_gic_cpuif_disable(void); 28 void plat_versal_net_gic_pcpu_init(void); 29 void plat_versal_net_gic_save(void); 30 void plat_versal_net_gic_resume(void); 31 void plat_versal_net_gic_redistif_on(void); 32 void plat_versal_net_gic_redistif_off(void); 33 34 extern uint32_t cpu_clock, platform_id, platform_version; 35 void board_detection(void); 36 char *board_name_decode(void); 37 uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, 38 uint64_t x4, void *cookie, void *handle, uint64_t flags); 39 int32_t sip_svc_setup_init(void); 40 /* 41 * Register handler to specific GIC entrance 42 * for INTR_TYPE_EL3 type of interrupt 43 */ 44 int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler); 45 46 #define PM_GET_CHIPID (24U) 47 #define IOCTL_OSPI_MUX_SELECT (21U) 48 49 #endif /* PLAT_PRIVATE_H */ 50