1# Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. 2# Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. 3# Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. 4# 5# SPDX-License-Identifier: BSD-3-Clause 6 7PLAT_PATH := plat/xilinx/versal_net 8 9# A78 Erratum for SoC 10ERRATA_A78_AE_1941500 := 1 11ERRATA_A78_AE_1951502 := 1 12ERRATA_A78_AE_2376748 := 1 13ERRATA_A78_AE_2395408 := 1 14 15override PROGRAMMABLE_RESET_ADDRESS := 1 16PSCI_EXTENDED_STATE_ID := 1 17SEPARATE_CODE_AND_RODATA := 1 18override RESET_TO_BL31 := 1 19PL011_GENERIC_UART := 1 20GIC_ENABLE_V4_EXTN := 0 21GICV3_SUPPORT_GIC600 := 1 22TFA_NO_PM := 0 23 24override CTX_INCLUDE_AARCH32_REGS := 0 25 26ifdef TFA_NO_PM 27 $(eval $(call add_define,TFA_NO_PM)) 28endif 29 30ifdef VERSAL_NET_ATF_MEM_BASE 31 $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE)) 32 33 ifndef VERSAL_NET_ATF_MEM_SIZE 34 $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE") 35 endif 36 $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE)) 37 38 ifdef VERSAL_NET_ATF_MEM_PROGBITS_SIZE 39 $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE)) 40 endif 41endif 42 43ifdef VERSAL_NET_BL32_MEM_BASE 44 $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE)) 45 46 ifndef VERSAL_NET_BL32_MEM_SIZE 47 $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE") 48 endif 49 $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE)) 50endif 51 52USE_COHERENT_MEM := 0 53HW_ASSISTED_COHERENCY := 1 54 55VERSAL_NET_CONSOLE ?= pl011 56$(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE})) 57 58PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 59 -Iplat/xilinx/common/include/ \ 60 -Iplat/xilinx/common/ipi_mailbox_service/ \ 61 -I${PLAT_PATH}/include/ \ 62 -Iplat/xilinx/versal/pm_service/ 63 64# Include GICv3 driver files 65include drivers/arm/gic/v3/gicv3.mk 66include lib/xlat_tables_v2/xlat_tables.mk 67include lib/libfdt/libfdt.mk 68 69PLAT_BL_COMMON_SOURCES := \ 70 drivers/delay_timer/delay_timer.c \ 71 drivers/delay_timer/generic_delay_timer.c \ 72 ${GICV3_SOURCES} \ 73 drivers/arm/pl011/aarch64/pl011_console.S \ 74 plat/arm/common/arm_common.c \ 75 plat/common/plat_gicv3.c \ 76 ${PLAT_PATH}/aarch64/versal_net_helpers.S \ 77 ${PLAT_PATH}/aarch64/versal_net_common.c 78 79BL31_SOURCES += drivers/arm/cci/cci.c \ 80 lib/cpus/aarch64/cortex_a78_ae.S \ 81 lib/cpus/aarch64/cortex_a78.S \ 82 plat/common/plat_psci_common.c 83ifeq ($(TFA_NO_PM), 0) 84BL31_SOURCES += plat/xilinx/versal/pm_service/pm_api_sys.c \ 85 plat/xilinx/common/pm_service/pm_ipi.c \ 86 ${PLAT_PATH}/plat_psci_pm.c \ 87 plat/xilinx/versal/pm_service/pm_svc_main.c \ 88 ${PLAT_PATH}/pm_service/pm_client.c \ 89 ${PLAT_PATH}/versal_net_ipi.c 90else 91BL31_SOURCES += ${PLAT_PATH}/plat_psci.c 92endif 93BL31_SOURCES += plat/xilinx/common/plat_startup.c \ 94 plat/xilinx/common/ipi.c \ 95 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 96 ${PLAT_PATH}/bl31_versal_net_setup.c \ 97 ${PLAT_PATH}/plat_topology.c \ 98 common/fdt_fixup.c \ 99 ${LIBFDT_SRCS} \ 100 ${PLAT_PATH}/sip_svc_setup.c \ 101 ${PLAT_PATH}/versal_net_gicv3.c \ 102 ${XLAT_TABLES_LIB_SRCS} 103