1 /*
2 * Copyright (C) 2022, Xilinx, Inc. All rights reserved.
3 * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 /*
9 * Versal NET IPI agent registers access management
10 */
11
12 #include <errno.h>
13 #include <string.h>
14
15 #include <common/debug.h>
16 #include <common/runtime_svc.h>
17 #include <lib/bakery_lock.h>
18 #include <lib/mmio.h>
19
20 #include <ipi.h>
21 #include <plat_ipi.h>
22 #include <plat_private.h>
23
24 /* versal_net ipi configuration table */
25 static const struct ipi_config versal_net_ipi_table[IPI_ID_MAX] = {
26 /* A72 IPI */
27 [IPI_ID_APU] = {
28 .ipi_bit_mask = IPI0_TRIG_BIT,
29 .ipi_reg_base = IPI0_REG_BASE,
30 .secure_only = 0,
31 },
32
33 /* PMC IPI */
34 [IPI_ID_PMC] = {
35 .ipi_bit_mask = PMC_IPI_TRIG_BIT,
36 .ipi_reg_base = IPI0_REG_BASE,
37 .secure_only = 0,
38 },
39
40 /* RPU0 IPI */
41 [IPI_ID_RPU0] = {
42 .ipi_bit_mask = IPI1_TRIG_BIT,
43 .ipi_reg_base = IPI1_REG_BASE,
44 .secure_only = 0,
45 },
46
47 /* RPU1 IPI */
48 [IPI_ID_RPU1] = {
49 .ipi_bit_mask = IPI2_TRIG_BIT,
50 .ipi_reg_base = IPI2_REG_BASE,
51 .secure_only = 0,
52 },
53
54 /* IPI3 IPI */
55 [IPI_ID_3] = {
56 .ipi_bit_mask = IPI3_TRIG_BIT,
57 .ipi_reg_base = IPI3_REG_BASE,
58 .secure_only = 0,
59 },
60
61 /* IPI4 IPI */
62 [IPI_ID_4] = {
63 .ipi_bit_mask = IPI4_TRIG_BIT,
64 .ipi_reg_base = IPI4_REG_BASE,
65 .secure_only = 0,
66 },
67
68 /* IPI5 IPI */
69 [IPI_ID_5] = {
70 .ipi_bit_mask = IPI5_TRIG_BIT,
71 .ipi_reg_base = IPI5_REG_BASE,
72 .secure_only = 0,
73 },
74 };
75
76 /* versal_net_ipi_config_table_init() - Initialize versal_net IPI configuration data
77 *
78 * @ipi_config_table - IPI configuration table
79 * @ipi_total - Total number of IPI available
80 *
81 */
versal_net_ipi_config_table_init(void)82 void versal_net_ipi_config_table_init(void)
83 {
84 ipi_config_table_init(versal_net_ipi_table, ARRAY_SIZE(versal_net_ipi_table));
85 }
86