1#
2# Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7ifneq (${SPD},none)
8        $(error "Error: SPD and SPM_MM are incompatible build options.")
9endif
10ifneq (${ARCH},aarch64)
11        $(error "Error: SPM_MM is only supported on aarch64.")
12endif
13ifeq (${ENABLE_SVE_FOR_NS},1)
14        $(error "Error: SPM_MM is not compatible with ENABLE_SVE_FOR_NS")
15endif
16ifeq (${ENABLE_SME_FOR_NS},1)
17        $(error "Error: SPM_MM is not compatible with ENABLE_SME_FOR_NS")
18endif
19ifeq (${CTX_INCLUDE_FPREGS},0)
20        $(warning "Warning: SPM_MM: CTX_INCLUDE_FPREGS is set to 0")
21endif
22
23SPM_MM_SOURCES	:=	$(addprefix services/std_svc/spm/spm_mm/,	\
24			${ARCH}/spm_mm_shim_exceptions.S		\
25			spm_mm_main.c					\
26			spm_mm_setup.c					\
27			spm_mm_xlat.c)
28
29
30# Let the top-level Makefile know that we intend to include a BL32 image
31NEED_BL32		:=	yes
32
33# required so that SPM code executing at S-EL0 can access the timer registers
34NS_TIMER_SWITCH		:=	1
35