1 /* 2 * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>, 3 * Alexander Warg <warg@os.inf.tu-dresden.de> 4 * economic rights: Technische Universität Dresden (Germany) 5 * 6 * This file is part of TUD:OS and distributed under the terms of the 7 * GNU General Public License 2. 8 * Please see the COPYING-GPL-2 file for details. 9 * 10 * As a special exception, you may use this file as part of a free software 11 * library without restriction. Specifically, if other files instantiate 12 * templates or use macros or inline functions from this file, or you compile 13 * this file and link it with other files to produce an executable, this 14 * file does not by itself cause the resulting executable to be covered by 15 * the GNU General Public License. This exception does not however 16 * invalidate any other reasons why the executable file might be covered by 17 * the GNU General Public License. 18 */ 19 #pragma once 20 21 #include <l4/sys/types.h> 22 #include <l4/sys/utcb.h> 23 #include <l4/sys/__vcpu-arm.h> 24 25 enum 26 { 27 /** 28 * Architecture specific version ID. 29 * 30 * This ID must match the version field in the l4_vcpu_state_t structure 31 * after enabling vCPU mode or extended vCPU mode for a thread. 32 */ 33 L4_VCPU_STATE_VERSION = 0x35 34 }; 35 36 /** 37 * \brief vCPU registers. 38 * \ingroup l4_vcpu_api 39 */ 40 typedef l4_exc_regs_t l4_vcpu_regs_t; 41 42 typedef struct l4_vcpu_arch_state_t 43 { 44 l4_umword_t host_tpidruro; 45 l4_umword_t user_tpidruro; 46 } l4_vcpu_arch_state_t; 47 48 /** 49 * \brief vCPU message registers. 50 * \ingroup l4_vcpu_api 51 */ 52 typedef struct l4_vcpu_ipc_regs_t 53 { 54 l4_msgtag_t tag; 55 l4_umword_t _d1[3]; 56 l4_umword_t label; 57 } l4_vcpu_ipc_regs_t; 58 59 /** 60 * IDs for extended vCPU state fields. 61 * 62 * Bits 14..15: are the field size: 63 * * 0 = 32bit field 64 * * 1 = register width field 65 * * 2 = 64bit field 66 */ 67 enum L4_vcpu_e_field_ids 68 { 69 L4_VCPU_E_HCR = 0x8008, 70 L4_VCPU_E_SCTLR = 0x0010, 71 L4_VCPU_E_CPACR = 0x0014, 72 73 L4_VCPU_E_CNTVCTL = 0x0018, 74 L4_VCPU_E_CNTVOFF = 0x8020, 75 76 L4_VCPU_E_VMPIDR = 0x8028, 77 L4_VCPU_E_VPIDR = 0x0030, 78 79 L4_VCPU_E_GIC_HCR = 0x0040, 80 L4_VCPU_E_GIC_VTR = 0x0044, 81 L4_VCPU_E_GIC_VMCR = 0x0048, 82 L4_VCPU_E_GIC_MISR = 0x004c, 83 L4_VCPU_E_GIC_EISR = 0x0050, 84 L4_VCPU_E_GIC_ELSR = 0x0054, 85 L4_VCPU_E_GIC_V2_LR0 = 0x0058, 86 L4_VCPU_E_GIC_V3_LR0 = 0x8058, 87 }; 88