1 #pragma once
2
3 #include <l4/sys/compiler.h>
4 #include <l4/sys/types.h>
5
6 /**
7 * Set the user-local register (ULR) for a given `thread`.
8 *
9 * \param thread The thread for which the ULR shall be set.
10 * \param ulr The value used for the ULR.
11 *
12 * \note The new ULR value for the thread might become active during the next
13 * thread switch if the thread is running on a different CPU than the caller.
14 */
15 L4_INLINE l4_msgtag_t
16 l4_thread_mips_set_ulr(l4_cap_idx_t thread, l4_umword_t ulr) L4_NOTHROW;
17
18
19 /**
20 * Save in-flight VM state for the given vCPU thread (MIPS).
21 *
22 * \param thread The vCPU thread for which the state shall be saved.
23 * \param vm_state_bits Each set bit requests that the corresponding register
24 * state shall be saved to the l4_vm_state_t. The bits
25 * are defined in `L4_vm_state_modified_bits`.
26 *
27 * After a successfull operation the `clean_cp0_map` indicates which state is
28 * now in sync with the VM. Note, this might be more than the requested state.
29 */
30 L4_INLINE l4_msgtag_t
31 l4_thread_mips_save_vm_state(l4_cap_idx_t thread,
32 l4_umword_t vm_state_bits) L4_NOTHROW;
33
34 /**
35 * \internal
36 */
37 L4_INLINE l4_msgtag_t
38 l4_thread_mips_set_ulr_u(l4_cap_idx_t thread, l4_umword_t ulr,
39 l4_utcb_t *utcb) L4_NOTHROW;
40
41
42 L4_INLINE l4_msgtag_t
l4_thread_mips_set_ulr_u(l4_cap_idx_t thread,l4_umword_t ulr,l4_utcb_t * utcb)43 l4_thread_mips_set_ulr_u(l4_cap_idx_t thread, l4_umword_t ulr,
44 l4_utcb_t *utcb) L4_NOTHROW
45 {
46 l4_utcb_mr_u(utcb)->mr[0] = 0x10;
47 l4_utcb_mr_u(utcb)->mr[1] = ulr;
48 return l4_ipc_call(thread, utcb,
49 l4_msgtag(L4_PROTO_THREAD, 2, 0, 0),
50 L4_IPC_NEVER);
51 }
52
53 L4_INLINE l4_msgtag_t
l4_thread_mips_set_ulr(l4_cap_idx_t thread,l4_umword_t ulr)54 l4_thread_mips_set_ulr(l4_cap_idx_t thread, l4_umword_t ulr) L4_NOTHROW
55 { return l4_thread_mips_set_ulr_u(thread, ulr, l4_utcb()); }
56
57 L4_INLINE l4_msgtag_t
58 l4_thread_mips_save_vm_state_u(l4_cap_idx_t thread, l4_umword_t vm_state_bits,
59 l4_utcb_t *utcb) L4_NOTHROW;
60
61 L4_INLINE l4_msgtag_t
l4_thread_mips_save_vm_state_u(l4_cap_idx_t thread,l4_umword_t vm_state_bits,l4_utcb_t * utcb)62 l4_thread_mips_save_vm_state_u(l4_cap_idx_t thread, l4_umword_t vm_state_bits,
63 l4_utcb_t *utcb) L4_NOTHROW
64 {
65 l4_utcb_mr_u(utcb)->mr[0] = 0x14;
66 l4_utcb_mr_u(utcb)->mr[1] = vm_state_bits;
67 return l4_ipc_call(thread, utcb,
68 l4_msgtag(L4_PROTO_THREAD, 2, 0, 0),
69 L4_IPC_NEVER);
70 }
71
72 L4_INLINE l4_msgtag_t
l4_thread_mips_save_vm_state(l4_cap_idx_t thread,l4_umword_t vm_state_bits)73 l4_thread_mips_save_vm_state(l4_cap_idx_t thread,
74 l4_umword_t vm_state_bits) L4_NOTHROW
75 {
76 return l4_thread_mips_save_vm_state_u(thread, vm_state_bits, l4_utcb());
77 }
78
79