1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Cadence DSI bridge 8 9maintainers: 10 - Boris Brezillon <boris.brezillon@bootlin.com> 11 12description: | 13 CDNS DSI is a bridge device which converts DPI to DSI 14 15properties: 16 compatible: 17 enum: 18 - cdns,dsi 19 - ti,j721e-dsi 20 21 reg: 22 minItems: 1 23 items: 24 - description: 25 Register block for controller's registers. 26 - description: 27 Register block for wrapper settings registers in case of TI J7 SoCs. 28 29 clocks: 30 items: 31 - description: PSM clock, used by the IP 32 - description: sys clock, used by the IP 33 34 clock-names: 35 items: 36 - const: dsi_p_clk 37 - const: dsi_sys_clk 38 39 phys: 40 maxItems: 1 41 42 phy-names: 43 const: dphy 44 45 interrupts: 46 maxItems: 1 47 48 resets: 49 maxItems: 1 50 51 reset-names: 52 const: dsi_p_rst 53 54 ports: 55 $ref: /schemas/graph.yaml#/properties/ports 56 57 properties: 58 port@0: 59 $ref: /schemas/graph.yaml#/properties/port 60 description: 61 Output port representing the DSI output. It can have 62 at most 4 endpoints. The endpoint number is directly encoding 63 the DSI virtual channel used by this device. 64 65 port@1: 66 $ref: /schemas/graph.yaml#/properties/port 67 description: 68 Input port representing the DPI input. 69 70 required: 71 - port@1 72 73allOf: 74 - $ref: ../dsi-controller.yaml# 75 76 - if: 77 properties: 78 compatible: 79 contains: 80 const: ti,j721e-dsi 81 then: 82 properties: 83 reg: 84 minItems: 2 85 maxItems: 2 86 power-domains: 87 maxItems: 1 88 else: 89 properties: 90 reg: 91 maxItems: 1 92 93required: 94 - compatible 95 - reg 96 - interrupts 97 - clocks 98 - clock-names 99 - phys 100 - phy-names 101 - ports 102 103unevaluatedProperties: false 104 105examples: 106 - | 107 bus { 108 #address-cells = <2>; 109 #size-cells = <2>; 110 111 dsi@fd0c0000 { 112 compatible = "cdns,dsi"; 113 reg = <0x0 0xfd0c0000 0x0 0x1000>; 114 clocks = <&pclk>, <&sysclk>; 115 clock-names = "dsi_p_clk", "dsi_sys_clk"; 116 interrupts = <1>; 117 phys = <&dphy0>; 118 phy-names = "dphy"; 119 120 #address-cells = <1>; 121 #size-cells = <0>; 122 123 ports { 124 #address-cells = <1>; 125 #size-cells = <0>; 126 127 port@1 { 128 reg = <1>; 129 endpoint { 130 remote-endpoint = <&xxx_dpi_output>; 131 }; 132 }; 133 }; 134 135 panel@0 { 136 compatible = "panasonic,vvx10f034n00"; 137 reg = <0>; 138 power-supply = <&vcc_lcd_reg>; 139 }; 140 }; 141 }; 142 143 - | 144 bus { 145 #address-cells = <2>; 146 #size-cells = <2>; 147 148 dsi@fd0c0000 { 149 compatible = "cdns,dsi"; 150 reg = <0x0 0xfd0c0000 0x0 0x1000>; 151 clocks = <&pclk>, <&sysclk>; 152 clock-names = "dsi_p_clk", "dsi_sys_clk"; 153 interrupts = <1>; 154 phys = <&dphy1>; 155 phy-names = "dphy"; 156 157 ports { 158 #address-cells = <1>; 159 #size-cells = <0>; 160 161 port@0 { 162 reg = <0>; 163 #address-cells = <1>; 164 #size-cells = <0>; 165 166 endpoint@0 { 167 reg = <0>; 168 remote-endpoint = <&dsi_panel_input>; 169 }; 170 }; 171 172 port@1 { 173 reg = <1>; 174 endpoint { 175 remote-endpoint = <&xxx_dpi_output>; 176 }; 177 }; 178 }; 179 }; 180 }; 181