1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/apple,admac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Apple Audio DMA Controller (ADMAC) 8 9description: | 10 Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples 11 on SoCs from the "Apple Silicon" family. 12 13 The controller has been seen with up to 24 channels. Even-numbered channels 14 are TX-only, odd-numbered are RX-only. Individual channels are coupled to 15 fixed device endpoints. 16 17maintainers: 18 - Martin Povišer <povik+lin@cutebit.org> 19 20allOf: 21 - $ref: dma-controller.yaml# 22 23properties: 24 compatible: 25 items: 26 - enum: 27 - apple,t6000-admac 28 - apple,t8103-admac 29 - const: apple,admac 30 31 reg: 32 maxItems: 1 33 34 '#dma-cells': 35 const: 1 36 description: 37 Clients specify a single cell with channel number. 38 39 dma-channels: 40 maximum: 24 41 42 interrupts: 43 minItems: 4 44 maxItems: 4 45 description: 46 Interrupts that correspond to the 4 IRQ outputs of the controller. Usually 47 only one of the controller outputs will be connected as an usable interrupt 48 source. The remaining interrupts will be left without a valid value, e.g. 49 in an interrupts-extended list the disconnected positions will contain 50 an empty phandle reference <0>. 51 52 iommus: 53 minItems: 1 54 maxItems: 2 55 56 power-domains: 57 maxItems: 1 58 59 resets: 60 maxItems: 1 61 62required: 63 - compatible 64 - reg 65 - '#dma-cells' 66 - dma-channels 67 - interrupts 68 69additionalProperties: false 70 71examples: 72 - | 73 #include <dt-bindings/interrupt-controller/apple-aic.h> 74 #include <dt-bindings/interrupt-controller/irq.h> 75 76 aic: interrupt-controller { 77 interrupt-controller; 78 #interrupt-cells = <3>; 79 }; 80 81 admac: dma-controller@238200000 { 82 compatible = "apple,t8103-admac", "apple,admac"; 83 reg = <0x38200000 0x34000>; 84 dma-channels = <24>; 85 interrupts-extended = <0>, 86 <&aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>, 87 <0>, 88 <0>; 89 #dma-cells = <1>; 90 }; 91