1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX 8 9maintainers: 10 - Joy Zou <joy.zou@nxp.com> 11 12allOf: 13 - $ref: dma-controller.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - fsl,imx50-sdma 21 - fsl,imx51-sdma 22 - fsl,imx53-sdma 23 - fsl,imx6q-sdma 24 - fsl,imx7d-sdma 25 - const: fsl,imx35-sdma 26 - items: 27 - enum: 28 - fsl,imx6sx-sdma 29 - fsl,imx6sl-sdma 30 - const: fsl,imx6q-sdma 31 - items: 32 - const: fsl,imx6ul-sdma 33 - const: fsl,imx6q-sdma 34 - const: fsl,imx35-sdma 35 - items: 36 - const: fsl,imx6sll-sdma 37 - const: fsl,imx6ul-sdma 38 - items: 39 - const: fsl,imx8mq-sdma 40 - const: fsl,imx7d-sdma 41 - items: 42 - enum: 43 - fsl,imx8mp-sdma 44 - fsl,imx8mn-sdma 45 - fsl,imx8mm-sdma 46 - const: fsl,imx8mq-sdma 47 - items: 48 - enum: 49 - fsl,imx25-sdma 50 - fsl,imx31-sdma 51 - fsl,imx35-sdma 52 reg: 53 maxItems: 1 54 55 interrupts: 56 maxItems: 1 57 58 fsl,sdma-ram-script-name: 59 $ref: /schemas/types.yaml#/definitions/string 60 description: Should contain the full path of SDMA RAM scripts firmware. 61 62 "#dma-cells": 63 const: 3 64 description: | 65 The first cell: request/event ID 66 67 The second cell: peripheral types ID 68 enum: 69 - MCU domain SSI: 0 70 - Shared SSI: 1 71 - MMC: 2 72 - SDHC: 3 73 - MCU domain UART: 4 74 - Shared UART: 5 75 - FIRI: 6 76 - MCU domain CSPI: 7 77 - Shared CSPI: 8 78 - SIM: 9 79 - ATA: 10 80 - CCM: 11 81 - External peripheral: 12 82 - Memory Stick Host Controller: 13 83 - Shared Memory Stick Host Controller: 14 84 - DSP: 15 85 - Memory: 16 86 - FIFO type Memory: 17 87 - SPDIF: 18 88 - IPU Memory: 19 89 - ASRC: 20 90 - ESAI: 21 91 - SSI Dual FIFO: 22 92 description: needs firmware more than ver 2 93 - Shared ASRC: 23 94 - SAI: 24 95 - HDMI Audio: 25 96 97 The third cell: transfer priority ID 98 enum: 99 - High: 0 100 - Medium: 1 101 - Low: 2 102 103 gpr: 104 $ref: /schemas/types.yaml#/definitions/phandle 105 description: The phandle to the General Purpose Register (GPR) node 106 107 fsl,sdma-event-remap: 108 $ref: /schemas/types.yaml#/definitions/uint32-matrix 109 maxItems: 2 110 items: 111 items: 112 - description: GPR register offset 113 - description: GPR register shift 114 - description: GPR register value 115 description: | 116 Register bits of sdma event remap, the format is <reg shift val>. 117 The order is <RX>, <TX>. 118 119 clocks: 120 maxItems: 2 121 122 clock-names: 123 items: 124 - const: ipg 125 - const: ahb 126 127 iram: 128 $ref: /schemas/types.yaml#/definitions/phandle 129 description: The phandle to the On-chip RAM (OCRAM) node. 130 131required: 132 - compatible 133 - reg 134 - interrupts 135 - fsl,sdma-ram-script-name 136 137additionalProperties: false 138 139examples: 140 - | 141 sdma: dma-controller@83fb0000 { 142 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 143 reg = <0x83fb0000 0x4000>; 144 interrupts = <6>; 145 #dma-cells = <3>; 146 fsl,sdma-ram-script-name = "sdma-imx51.bin"; 147 }; 148 149... 150