1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek MT7530 and MT7531 Ethernet Switches
8
9maintainers:
10  - Arınç ÜNAL <arinc.unal@arinc9.com>
11  - Landen Chao <Landen.Chao@mediatek.com>
12  - DENG Qingfang <dqfext@gmail.com>
13  - Sean Wang <sean.wang@mediatek.com>
14
15description: |
16  There are two versions of MT7530, standalone and in a multi-chip module.
17
18  MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
19  MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs.
20
21  MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs
22  and the switch registers are directly mapped into SoC's memory map rather than
23  using MDIO. The DSA driver currently doesn't support this.
24
25  There is only the standalone version of MT7531.
26
27  Port 5 on MT7530 has got various ways of configuration:
28
29    - Port 5 can be used as a CPU port.
30
31    - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,
32      the gmac of the SoC which is wired to port 5 can connect to the PHY.
33      This is usually used for connecting the wan port directly to the CPU to
34      achieve 2 Gbps routing in total.
35
36      The driver looks up the reg on the ethernet-phy node, which the phy-handle
37      property on the gmac node refers to, to mux the specified phy.
38
39      The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
40      compatible string and the reg must be 1. So, for now, only gmac1 of a
41      MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
42
43      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
44
45      Check out example 5.
46
47    - For the multi-chip module MT7530, in case of an external phy wired to
48      gmac1 of the SoC, port 5 must not be enabled.
49
50      In case of muxing PHY 0 or 4, the external phy must not be enabled.
51
52      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
53
54      Check out example 6.
55
56    - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave.
57
58      For the multi-chip module MT7530, the external phy must be wired TX to TX
59      to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired
60      this way.
61
62      For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the
63      external phy is connected TX to TX.
64
65      For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.
66
67      Check out example 7.
68
69properties:
70  compatible:
71    oneOf:
72      - description:
73          Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
74        const: mediatek,mt7530
75
76      - description:
77          Standalone MT7531
78        const: mediatek,mt7531
79
80      - description:
81          Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
82        const: mediatek,mt7621
83
84  reg:
85    maxItems: 1
86
87  core-supply:
88    description:
89      Phandle to the regulator node necessary for the core power.
90
91  "#gpio-cells":
92    const: 2
93
94  gpio-controller:
95    type: boolean
96    description:
97      If defined, LED controller of the MT7530 switch will run on GPIO mode.
98
99      There are 15 controllable pins.
100      port 0 LED 0..2 as GPIO 0..2
101      port 1 LED 0..2 as GPIO 3..5
102      port 2 LED 0..2 as GPIO 6..8
103      port 3 LED 0..2 as GPIO 9..11
104      port 4 LED 0..2 as GPIO 12..14
105
106  "#interrupt-cells":
107    const: 1
108
109  interrupt-controller: true
110
111  interrupts:
112    maxItems: 1
113
114  io-supply:
115    description:
116      Phandle to the regulator node necessary for the I/O power.
117      See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
118      details for the regulator setup on these boards.
119
120  mediatek,mcm:
121    type: boolean
122    description:
123      Used for MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs which the MT7530
124      switch is a part of the multi-chip module.
125
126  reset-gpios:
127    description:
128      GPIO to reset the switch. Use this if mediatek,mcm is not used.
129      This property is optional because some boards share the reset line with
130      other components which makes it impossible to probe the switch if the
131      reset line is used.
132    maxItems: 1
133
134  reset-names:
135    const: mcm
136
137  resets:
138    description:
139      Phandle pointing to the system reset controller with line index for the
140      ethsys.
141    maxItems: 1
142
143patternProperties:
144  "^(ethernet-)?ports$":
145    type: object
146
147    patternProperties:
148      "^(ethernet-)?port@[0-9]+$":
149        type: object
150
151        properties:
152          reg:
153            description:
154              Port address described must be 5 or 6 for CPU port and from 0 to 5
155              for user ports.
156
157        allOf:
158          - if:
159              required: [ ethernet ]
160            then:
161              properties:
162                reg:
163                  enum:
164                    - 5
165                    - 6
166
167required:
168  - compatible
169  - reg
170
171$defs:
172  mt7530-dsa-port:
173    patternProperties:
174      "^(ethernet-)?ports$":
175        patternProperties:
176          "^(ethernet-)?port@[0-9]+$":
177            if:
178              required: [ ethernet ]
179            then:
180              if:
181                properties:
182                  reg:
183                    const: 5
184              then:
185                properties:
186                  phy-mode:
187                    enum:
188                      - gmii
189                      - mii
190                      - rgmii
191              else:
192                properties:
193                  phy-mode:
194                    enum:
195                      - rgmii
196                      - trgmii
197
198  mt7531-dsa-port:
199    patternProperties:
200      "^(ethernet-)?ports$":
201        patternProperties:
202          "^(ethernet-)?port@[0-9]+$":
203            if:
204              required: [ ethernet ]
205            then:
206              if:
207                properties:
208                  reg:
209                    const: 5
210              then:
211                properties:
212                  phy-mode:
213                    enum:
214                      - 1000base-x
215                      - 2500base-x
216                      - rgmii
217                      - sgmii
218              else:
219                properties:
220                  phy-mode:
221                    enum:
222                      - 1000base-x
223                      - 2500base-x
224                      - sgmii
225
226allOf:
227  - $ref: dsa.yaml#/$defs/ethernet-ports
228  - if:
229      required:
230        - mediatek,mcm
231    then:
232      properties:
233        reset-gpios: false
234
235      required:
236        - resets
237        - reset-names
238
239  - dependencies:
240      interrupt-controller: [ interrupts ]
241
242  - if:
243      properties:
244        compatible:
245          const: mediatek,mt7530
246    then:
247      $ref: "#/$defs/mt7530-dsa-port"
248      required:
249        - core-supply
250        - io-supply
251
252  - if:
253      properties:
254        compatible:
255          const: mediatek,mt7531
256    then:
257      $ref: "#/$defs/mt7531-dsa-port"
258      properties:
259        gpio-controller: false
260        mediatek,mcm: false
261
262  - if:
263      properties:
264        compatible:
265          const: mediatek,mt7621
266    then:
267      $ref: "#/$defs/mt7530-dsa-port"
268      required:
269        - mediatek,mcm
270
271unevaluatedProperties: false
272
273examples:
274  # Example 1: Standalone MT7530
275  - |
276    #include <dt-bindings/gpio/gpio.h>
277
278    mdio {
279        #address-cells = <1>;
280        #size-cells = <0>;
281
282        switch@1f {
283            compatible = "mediatek,mt7530";
284            reg = <0x1f>;
285
286            reset-gpios = <&pio 33 0>;
287
288            core-supply = <&mt6323_vpa_reg>;
289            io-supply = <&mt6323_vemc3v3_reg>;
290
291            ethernet-ports {
292                #address-cells = <1>;
293                #size-cells = <0>;
294
295                port@0 {
296                    reg = <0>;
297                    label = "lan1";
298                };
299
300                port@1 {
301                    reg = <1>;
302                    label = "lan2";
303                };
304
305                port@2 {
306                    reg = <2>;
307                    label = "lan3";
308                };
309
310                port@3 {
311                    reg = <3>;
312                    label = "lan4";
313                };
314
315                port@4 {
316                    reg = <4>;
317                    label = "wan";
318                };
319
320                port@6 {
321                    reg = <6>;
322                    ethernet = <&gmac0>;
323                    phy-mode = "rgmii";
324
325                    fixed-link {
326                        speed = <1000>;
327                        full-duplex;
328                        pause;
329                    };
330                };
331            };
332        };
333    };
334
335  # Example 2: MT7530 in MT7623AI SoC
336  - |
337    #include <dt-bindings/reset/mt2701-resets.h>
338
339    mdio {
340        #address-cells = <1>;
341        #size-cells = <0>;
342
343        switch@1f {
344            compatible = "mediatek,mt7530";
345            reg = <0x1f>;
346
347            mediatek,mcm;
348            resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
349            reset-names = "mcm";
350
351            core-supply = <&mt6323_vpa_reg>;
352            io-supply = <&mt6323_vemc3v3_reg>;
353
354            ethernet-ports {
355                #address-cells = <1>;
356                #size-cells = <0>;
357
358                port@0 {
359                    reg = <0>;
360                    label = "lan1";
361                };
362
363                port@1 {
364                    reg = <1>;
365                    label = "lan2";
366                };
367
368                port@2 {
369                    reg = <2>;
370                    label = "lan3";
371                };
372
373                port@3 {
374                    reg = <3>;
375                    label = "lan4";
376                };
377
378                port@4 {
379                    reg = <4>;
380                    label = "wan";
381                };
382
383                port@6 {
384                    reg = <6>;
385                    ethernet = <&gmac0>;
386                    phy-mode = "trgmii";
387
388                    fixed-link {
389                        speed = <1000>;
390                        full-duplex;
391                        pause;
392                    };
393                };
394            };
395        };
396    };
397
398  # Example 3: Standalone MT7531
399  - |
400    #include <dt-bindings/gpio/gpio.h>
401    #include <dt-bindings/interrupt-controller/irq.h>
402
403    mdio {
404        #address-cells = <1>;
405        #size-cells = <0>;
406
407        switch@0 {
408            compatible = "mediatek,mt7531";
409            reg = <0>;
410
411            reset-gpios = <&pio 54 0>;
412
413            interrupt-controller;
414            #interrupt-cells = <1>;
415            interrupt-parent = <&pio>;
416            interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
417
418            ethernet-ports {
419                #address-cells = <1>;
420                #size-cells = <0>;
421
422                port@0 {
423                    reg = <0>;
424                    label = "lan1";
425                };
426
427                port@1 {
428                    reg = <1>;
429                    label = "lan2";
430                };
431
432                port@2 {
433                    reg = <2>;
434                    label = "lan3";
435                };
436
437                port@3 {
438                    reg = <3>;
439                    label = "lan4";
440                };
441
442                port@4 {
443                    reg = <4>;
444                    label = "wan";
445                };
446
447                port@6 {
448                    reg = <6>;
449                    ethernet = <&gmac0>;
450                    phy-mode = "2500base-x";
451
452                    fixed-link {
453                        speed = <2500>;
454                        full-duplex;
455                        pause;
456                    };
457                };
458            };
459        };
460    };
461
462  # Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
463  - |
464    #include <dt-bindings/interrupt-controller/mips-gic.h>
465    #include <dt-bindings/reset/mt7621-reset.h>
466
467    mdio {
468        #address-cells = <1>;
469        #size-cells = <0>;
470
471        switch@1f {
472            compatible = "mediatek,mt7621";
473            reg = <0x1f>;
474
475            mediatek,mcm;
476            resets = <&sysc MT7621_RST_MCM>;
477            reset-names = "mcm";
478
479            interrupt-controller;
480            #interrupt-cells = <1>;
481            interrupt-parent = <&gic>;
482            interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
483
484            ethernet-ports {
485                #address-cells = <1>;
486                #size-cells = <0>;
487
488                port@0 {
489                    reg = <0>;
490                    label = "lan1";
491                };
492
493                port@1 {
494                    reg = <1>;
495                    label = "lan2";
496                };
497
498                port@2 {
499                    reg = <2>;
500                    label = "lan3";
501                };
502
503                port@3 {
504                    reg = <3>;
505                    label = "lan4";
506                };
507
508                port@4 {
509                    reg = <4>;
510                    label = "wan";
511                };
512
513                port@6 {
514                    reg = <6>;
515                    ethernet = <&gmac0>;
516                    phy-mode = "trgmii";
517
518                    fixed-link {
519                        speed = <1000>;
520                        full-duplex;
521                        pause;
522                    };
523                };
524            };
525        };
526    };
527
528  # Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1
529  - |
530    #include <dt-bindings/interrupt-controller/mips-gic.h>
531    #include <dt-bindings/reset/mt7621-reset.h>
532
533    ethernet {
534        #address-cells = <1>;
535        #size-cells = <0>;
536
537        pinctrl-names = "default";
538        pinctrl-0 = <&rgmii2_pins>;
539
540        mac@1 {
541            compatible = "mediatek,eth-mac";
542            reg = <1>;
543
544            phy-mode = "rgmii";
545            phy-handle = <&example5_ethphy4>;
546        };
547
548        mdio {
549            #address-cells = <1>;
550            #size-cells = <0>;
551
552            /* MT7530's phy4 */
553            example5_ethphy4: ethernet-phy@4 {
554                reg = <4>;
555            };
556
557            switch@1f {
558                compatible = "mediatek,mt7621";
559                reg = <0x1f>;
560
561                mediatek,mcm;
562                resets = <&sysc MT7621_RST_MCM>;
563                reset-names = "mcm";
564
565                interrupt-controller;
566                #interrupt-cells = <1>;
567                interrupt-parent = <&gic>;
568                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
569
570                ethernet-ports {
571                    #address-cells = <1>;
572                    #size-cells = <0>;
573
574                    port@0 {
575                        reg = <0>;
576                        label = "lan1";
577                    };
578
579                    port@1 {
580                        reg = <1>;
581                        label = "lan2";
582                    };
583
584                    port@2 {
585                        reg = <2>;
586                        label = "lan3";
587                    };
588
589                    port@3 {
590                        reg = <3>;
591                        label = "lan4";
592                    };
593
594                    /* Commented out, phy4 is connected to gmac1.
595                    port@4 {
596                        reg = <4>;
597                        label = "wan";
598                    };
599                    */
600
601                    port@6 {
602                        reg = <6>;
603                        ethernet = <&gmac0>;
604                        phy-mode = "trgmii";
605
606                        fixed-link {
607                            speed = <1000>;
608                            full-duplex;
609                            pause;
610                        };
611                    };
612                };
613            };
614        };
615    };
616
617  # Example 6: MT7621: mux external phy to SoC's gmac1
618  - |
619    #include <dt-bindings/interrupt-controller/mips-gic.h>
620    #include <dt-bindings/reset/mt7621-reset.h>
621
622    ethernet {
623        #address-cells = <1>;
624        #size-cells = <0>;
625
626        pinctrl-names = "default";
627        pinctrl-0 = <&rgmii2_pins>;
628
629        mac@1 {
630            compatible = "mediatek,eth-mac";
631            reg = <1>;
632
633            phy-mode = "rgmii";
634            phy-handle = <&example6_ethphy7>;
635        };
636
637        mdio {
638            #address-cells = <1>;
639            #size-cells = <0>;
640
641            /* External PHY */
642            example6_ethphy7: ethernet-phy@7 {
643                reg = <7>;
644                phy-mode = "rgmii";
645            };
646
647            switch@1f {
648                compatible = "mediatek,mt7621";
649                reg = <0x1f>;
650
651                mediatek,mcm;
652                resets = <&sysc MT7621_RST_MCM>;
653                reset-names = "mcm";
654
655                interrupt-controller;
656                #interrupt-cells = <1>;
657                interrupt-parent = <&gic>;
658                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
659
660                ethernet-ports {
661                    #address-cells = <1>;
662                    #size-cells = <0>;
663
664                    port@0 {
665                        reg = <0>;
666                        label = "lan1";
667                    };
668
669                    port@1 {
670                        reg = <1>;
671                        label = "lan2";
672                    };
673
674                    port@2 {
675                        reg = <2>;
676                        label = "lan3";
677                    };
678
679                    port@3 {
680                        reg = <3>;
681                        label = "lan4";
682                    };
683
684                    port@4 {
685                        reg = <4>;
686                        label = "wan";
687                    };
688
689                    port@6 {
690                        reg = <6>;
691                        ethernet = <&gmac0>;
692                        phy-mode = "trgmii";
693
694                        fixed-link {
695                            speed = <1000>;
696                            full-duplex;
697                            pause;
698                        };
699                    };
700                };
701            };
702        };
703    };
704
705  # Example 7: MT7621: mux external phy to MT7530's port 5
706  - |
707    #include <dt-bindings/interrupt-controller/mips-gic.h>
708    #include <dt-bindings/reset/mt7621-reset.h>
709
710    ethernet {
711        #address-cells = <1>;
712        #size-cells = <0>;
713
714        pinctrl-names = "default";
715        pinctrl-0 = <&rgmii2_pins>;
716
717        mdio {
718            #address-cells = <1>;
719            #size-cells = <0>;
720
721            /* External PHY */
722            example7_ethphy7: ethernet-phy@7 {
723                reg = <7>;
724                phy-mode = "rgmii";
725            };
726
727            switch@1f {
728                compatible = "mediatek,mt7621";
729                reg = <0x1f>;
730
731                mediatek,mcm;
732                resets = <&sysc MT7621_RST_MCM>;
733                reset-names = "mcm";
734
735                interrupt-controller;
736                #interrupt-cells = <1>;
737                interrupt-parent = <&gic>;
738                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
739
740                ethernet-ports {
741                    #address-cells = <1>;
742                    #size-cells = <0>;
743
744                    port@0 {
745                        reg = <0>;
746                        label = "lan1";
747                    };
748
749                    port@1 {
750                        reg = <1>;
751                        label = "lan2";
752                    };
753
754                    port@2 {
755                        reg = <2>;
756                        label = "lan3";
757                    };
758
759                    port@3 {
760                        reg = <3>;
761                        label = "lan4";
762                    };
763
764                    port@4 {
765                        reg = <4>;
766                        label = "wan";
767                    };
768
769                    port@5 {
770                        reg = <5>;
771                        label = "extphy";
772                        phy-mode = "rgmii-txid";
773                        phy-handle = <&example7_ethphy7>;
774                    };
775
776                    port@6 {
777                        reg = <6>;
778                        ethernet = <&gmac0>;
779                        phy-mode = "trgmii";
780
781                        fixed-link {
782                            speed = <1000>;
783                            full-duplex;
784                            pause;
785                        };
786                    };
787                };
788            };
789        };
790    };
791