1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek mt76 wireless devices 9 10maintainers: 11 - Felix Fietkau <nbd@nbd.name> 12 - Lorenzo Bianconi <lorenzo@kernel.org> 13 - Ryder Lee <ryder.lee@mediatek.com> 14 15description: | 16 This node provides properties for configuring the MediaTek mt76xx 17 wireless device. The node is expected to be specified as a child 18 node of the PCI controller to which the wireless chip is connected. 19 Alternatively, it can specify the wireless part of the MT7628/MT7688 20 or MT7622/MT7986 SoC. 21 22allOf: 23 - $ref: ieee80211.yaml# 24 25properties: 26 compatible: 27 enum: 28 - mediatek,mt76 29 - mediatek,mt7628-wmac 30 - mediatek,mt7622-wmac 31 - mediatek,mt7986-wmac 32 33 reg: 34 minItems: 1 35 maxItems: 3 36 description: 37 MT7986 should contain 3 regions consys, dcm, and sku, in this order. 38 39 interrupts: 40 maxItems: 1 41 42 power-domains: 43 maxItems: 1 44 45 memory-region: 46 maxItems: 1 47 48 resets: 49 maxItems: 1 50 description: 51 Specify the consys reset for mt7986. 52 53 reset-names: 54 const: consys 55 56 clocks: 57 maxItems: 2 58 description: 59 Specify the consys clocks for mt7986. 60 61 clock-names: 62 items: 63 - const: mcu 64 - const: ap2conn 65 66 mediatek,infracfg: 67 $ref: /schemas/types.yaml#/definitions/phandle 68 description: 69 Phandle to the infrastructure bus fabric syscon node. 70 This property is MT7622 specific 71 72 ieee80211-freq-limit: true 73 74 mediatek,eeprom-data: 75 $ref: /schemas/types.yaml#/definitions/uint32-array 76 description: 77 EEPROM data embedded as array. 78 79 mediatek,mtd-eeprom: 80 $ref: /schemas/types.yaml#/definitions/phandle-array 81 items: 82 - items: 83 - description: phandle to MTD partition 84 - description: offset containing EEPROM data 85 description: 86 Phandle to a MTD partition + offset containing EEPROM data 87 88 big-endian: 89 $ref: /schemas/types.yaml#/definitions/flag 90 description: 91 Specify if the radio eeprom partition is written in big-endian 92 93 mediatek,eeprom-merge-otp: 94 type: boolean 95 description: 96 Merge EEPROM data with OTP data. Can be used on boards where the flash 97 calibration data is generic and specific calibration data should be 98 pulled from the OTP ROM 99 100 mediatek,disable-radar-background: 101 type: boolean 102 description: 103 Disable/enable radar/CAC detection running on a dedicated offchannel 104 chain available on some hw. 105 Background radar/CAC detection allows to avoid the CAC downtime 106 switching on a different channel during CAC detection on the selected 107 radar channel. 108 109 led: 110 type: object 111 $ref: /schemas/leds/common.yaml# 112 additionalProperties: false 113 properties: 114 led-sources: 115 maxItems: 1 116 117 power-limits: 118 type: object 119 additionalProperties: false 120 patternProperties: 121 "^r[0-9]+": 122 type: object 123 additionalProperties: false 124 properties: 125 regdomain: 126 $ref: /schemas/types.yaml#/definitions/string 127 description: 128 Regdomain refers to a legal regulatory region. Different 129 countries define different levels of allowable transmitter 130 power, time that a channel can be occupied, and different 131 available channels 132 enum: 133 - FCC 134 - ETSI 135 - JP 136 137 patternProperties: 138 "^txpower-[256]g$": 139 type: object 140 additionalProperties: false 141 patternProperties: 142 "^b[0-9]+$": 143 type: object 144 additionalProperties: false 145 properties: 146 channels: 147 $ref: /schemas/types.yaml#/definitions/uint32-array 148 minItems: 2 149 maxItems: 2 150 description: 151 Pairs of first and last channel number of the selected 152 band 153 154 rates-cck: 155 $ref: /schemas/types.yaml#/definitions/uint8-array 156 minItems: 4 157 maxItems: 4 158 description: 159 4 half-dBm per-rate power limit values 160 161 rates-ofdm: 162 $ref: /schemas/types.yaml#/definitions/uint8-array 163 minItems: 8 164 maxItems: 8 165 description: 166 8 half-dBm per-rate power limit values 167 168 rates-mcs: 169 $ref: /schemas/types.yaml#/definitions/uint8-matrix 170 description: 171 Sets of per-rate power limit values for 802.11n/802.11ac 172 rates for multiple channel bandwidth settings. 173 Each set starts with the number of channel bandwidth 174 settings for which the rate set applies, followed by 175 either 8 or 10 power limit values. The order of the 176 channel bandwidth settings is 20, 40, 80 and 160 MHz. 177 maxItems: 4 178 items: 179 minItems: 9 180 maxItems: 11 181 182 rates-ru: 183 $ref: /schemas/types.yaml#/definitions/uint8-matrix 184 description: 185 Sets of per-rate power limit values for 802.11ax rates 186 for multiple channel bandwidth or resource unit settings. 187 Each set starts with the number of channel bandwidth or 188 resource unit settings for which the rate set applies, 189 followed by 12 power limit values. The order of the 190 channel resource unit settings is RU26, RU52, RU106, 191 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 192 items: 193 minItems: 13 194 maxItems: 13 195 196 txs-delta: 197 $ref: /schemas/types.yaml#/definitions/uint32-array 198 description: 199 Half-dBm power delta for different numbers of antennas 200 201required: 202 - compatible 203 - reg 204 205unevaluatedProperties: false 206 207examples: 208 - | 209 pcie0 { 210 #address-cells = <3>; 211 #size-cells = <2>; 212 wifi@0,0 { 213 compatible = "mediatek,mt76"; 214 reg = <0x0000 0 0 0 0>; 215 ieee80211-freq-limit = <5000000 6000000>; 216 mediatek,mtd-eeprom = <&factory 0x8000>; 217 big-endian; 218 219 led { 220 led-sources = <2>; 221 }; 222 223 power-limits { 224 r0 { 225 regdomain = "FCC"; 226 txpower-5g { 227 b0 { 228 channels = <36 48>; 229 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>; 230 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>, 231 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>; 232 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>, 233 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>; 234 }; 235 b1 { 236 channels = <100 181>; 237 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>; 238 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>; 239 txs-delta = <12 9 6>; 240 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>; 241 }; 242 }; 243 }; 244 }; 245 }; 246 }; 247 248 - | 249 wifi@10300000 { 250 compatible = "mediatek,mt7628-wmac"; 251 reg = <0x10300000 0x100000>; 252 253 interrupt-parent = <&cpuintc>; 254 interrupts = <6>; 255 256 mediatek,mtd-eeprom = <&factory 0x0>; 257 }; 258 259 - | 260 #include <dt-bindings/interrupt-controller/arm-gic.h> 261 #include <dt-bindings/interrupt-controller/irq.h> 262 wifi@18000000 { 263 compatible = "mediatek,mt7622-wmac"; 264 reg = <0x10300000 0x100000>; 265 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; 266 267 mediatek,infracfg = <&infracfg>; 268 269 power-domains = <&scpsys 3>; 270 }; 271 272 - | 273 wifi@18000000 { 274 compatible = "mediatek,mt7986-wmac"; 275 resets = <&watchdog 23>; 276 reset-names = "consys"; 277 reg = <0x18000000 0x1000000>, 278 <0x10003000 0x1000>, 279 <0x11d10000 0x1000>; 280 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; 281 clocks = <&topckgen 50>, 282 <&topckgen 62>; 283 clock-names = "mcu", "ap2conn"; 284 memory-region = <&wmcpu_emi>; 285 }; 286