1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek MT7981 Pin Controller 8 9maintainers: 10 - Daniel Golle <daniel@makrotopia.org> 11 12description: 13 The MediaTek's MT7981 Pin controller is used to control SoC pins. 14 15properties: 16 compatible: 17 enum: 18 - mediatek,mt7981-pinctrl 19 20 reg: 21 minItems: 9 22 maxItems: 9 23 24 reg-names: 25 items: 26 - const: gpio 27 - const: iocfg_rt 28 - const: iocfg_rm 29 - const: iocfg_rb 30 - const: iocfg_lb 31 - const: iocfg_bl 32 - const: iocfg_tm 33 - const: iocfg_tl 34 - const: eint 35 36 gpio-controller: true 37 38 "#gpio-cells": 39 const: 2 40 description: > 41 Number of cells in GPIO specifier. Since the generic GPIO binding is used, 42 the amount of cells must be specified as 2. See the below mentioned gpio 43 binding representation for description of particular cells. 44 45 gpio-ranges: 46 minItems: 1 47 maxItems: 5 48 description: GPIO valid number range. 49 50 interrupt-controller: true 51 52 interrupts: 53 maxItems: 1 54 55 "#interrupt-cells": 56 const: 2 57 58allOf: 59 - $ref: pinctrl.yaml# 60 61required: 62 - compatible 63 - reg 64 - reg-names 65 - gpio-controller 66 - "#gpio-cells" 67 68patternProperties: 69 '-pins$': 70 type: object 71 additionalProperties: false 72 73 patternProperties: 74 '^.*mux.*$': 75 type: object 76 additionalProperties: false 77 description: | 78 pinmux configuration nodes. 79 80 The following table shows the effective values of "group", "function" 81 properties and chip pinout pins 82 83 groups function pins (in pin#) 84 --------------------------------------------------------------------- 85 "wa_aice1" "wa_aice" 0, 1 86 "wa_aice2" "wa_aice" 0, 1 87 "wm_uart_0" "uart" 0, 1 88 "dfd" "dfd" 0, 1, 4, 5 89 "watchdog" "watchdog" 2 90 "pcie_pereset" "pcie" 3 91 "jtag" "jtag" 4, 5, 6, 7, 8 92 "wm_jtag_0" "jtag" 4, 5, 6, 7, 8 93 "wo0_jtag_0" "jtag" 9, 10, 11, 12, 13 94 "uart2_0" "uart" 4, 5, 6, 7 95 "gbe_led0" "led" 8 96 "pta_ext_0" "pta" 4, 5, 6 97 "pwm2" "pwm" 7 98 "net_wo0_uart_txd_0" "uart" 8 99 "spi1_0" "spi" 4, 5, 6, 7 100 "i2c0_0" "i2c" 6, 7 101 "dfd_ntrst" "dfd" 8 102 "wm_aice1" "wa_aice" 9, 10 103 "pwm0_0" "pwm" 13 104 "pwm0_1" "pwm" 15 105 "pwm1_0" "pwm" 14 106 "pwm1_1" "pwm" 15 107 "net_wo0_uart_txd_1" "uart" 14 108 "net_wo0_uart_txd_2" "uart" 15 109 "gbe_led1" "led" 13 110 "pcm" "pcm" 9, 10, 11, 12, 13, 25 111 "watchdog1" "watchdog" 13 112 "udi" "udi" 9, 10, 11, 12, 13 113 "drv_vbus" "usb" 14 114 "emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25 115 "snfi" "flash" 16, 17, 18, 19, 20, 21 116 "spi0" "spi" 16, 17, 18, 19 117 "spi0_wp_hold" "spi" 20, 21 118 "spi1_1" "spi" 22, 23, 24, 25 119 "spi2" "spi" 26, 27, 28, 29 120 "spi2_wp_hold" "spi" 30, 31 121 "uart1_0" "uart" 16, 17, 18, 19 122 "uart1_1" "uart" 26, 27, 28, 29 123 "uart2_1" "uart" 22, 23, 24, 25 124 "pta_ext_1" "pta" 22, 23, 24 125 "wm_aurt_1" "uart" 20, 21 126 "wm_aurt_2" "uart" 30, 31 127 "wm_jtag_1" "jtag" 20, 21, 22, 23, 24 128 "wo0_jtag_1" "jtag" 25, 26, 27, 28, 29 129 "wa_aice3" "wa_aice" 28, 20 130 "wm_aice2" "wa_aice" 30, 31 131 "i2c0_1" "i2c" 30, 31 132 "u2_phy_i2c" "i2c" 30, 31 133 "uart0" "uart" 32, 33 134 "sgmii1_phy_i2c" "i2c" 32, 33 135 "u3_phy_i2c" "i2c" 32, 33 136 "sgmii0_phy_i2c" "i2c" 32, 33 137 "pcie_clk" "pcie" 34 138 "pcie_wake" "pcie" 35 139 "i2c0_2" "i2c" 36, 37 140 "smi_mdc_mdio" "eth" 36, 37 141 "gbe_ext_mdc_mdio" "eth" 36, 37 142 "wf0_mode1" "eth" 40, 41, 42, 43, 44, 45, 46, 47, 48, 143 49, 50, 51, 52, 53, 54, 55, 56 144 145 "wf0_mode3" "eth" 45, 46, 47, 48, 49, 51 146 "wf2g_led0" "led" 30 147 "wf2g_led1" "led" 34 148 "wf5g_led0" "led" 31 149 "wf5g_led1" "led" 35 150 "mt7531_int" "eth" 38 151 "ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22 152 23, 24, 25, 34, 35 153 154 $ref: /schemas/pinctrl/pinmux-node.yaml 155 properties: 156 function: 157 description: 158 A string containing the name of the function to mux to the group. 159 enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led, 160 pwm, spi, uart, watchdog, flash, pcie] 161 groups: 162 description: 163 An array of strings. Each string contains the name of a group. 164 165 required: 166 - function 167 - groups 168 169 allOf: 170 - if: 171 properties: 172 function: 173 const: wa_aice 174 then: 175 properties: 176 groups: 177 enum: [wa_aice1, wa_aice2, wm_aice1_1, wa_aice3, wm_aice1_2] 178 - if: 179 properties: 180 function: 181 const: dfd 182 then: 183 properties: 184 groups: 185 enum: [dfd, dfd_ntrst] 186 - if: 187 properties: 188 function: 189 const: jtag 190 then: 191 properties: 192 groups: 193 enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1] 194 - if: 195 properties: 196 function: 197 const: pta 198 then: 199 properties: 200 groups: 201 enum: [pta_ext_0, pta_ext_1] 202 - if: 203 properties: 204 function: 205 const: pcm 206 then: 207 properties: 208 groups: 209 enum: [pcm] 210 - if: 211 properties: 212 function: 213 const: udi 214 then: 215 properties: 216 groups: 217 enum: [udi] 218 - if: 219 properties: 220 function: 221 const: usb 222 then: 223 properties: 224 groups: 225 enum: [drv_vbus] 226 - if: 227 properties: 228 function: 229 const: ant 230 then: 231 properties: 232 groups: 233 enum: [ant_sel] 234 - if: 235 properties: 236 function: 237 const: eth 238 then: 239 properties: 240 groups: 241 enum: [smi_mdc_mdio, gbe_ext_mdc_mdio, wf0_mode1, wf0_mode3, 242 mt7531_int] 243 - if: 244 properties: 245 function: 246 const: i2c 247 then: 248 properties: 249 groups: 250 enum: [i2c0_0, i2c0_1, u2_phy_i2c, sgmii1_phy_i2c, u3_phy_i2c, 251 sgmii0_phy_i2c, i2c0_2] 252 - if: 253 properties: 254 function: 255 const: led 256 then: 257 properties: 258 groups: 259 enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1] 260 - if: 261 properties: 262 function: 263 const: pwm 264 then: 265 properties: 266 groups: 267 items: 268 enum: [pwm2, pwm0_0, pwm0_1, pwm1_0, pwm1_1] 269 maxItems: 3 270 - if: 271 properties: 272 function: 273 const: spi 274 then: 275 properties: 276 groups: 277 items: 278 enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold] 279 maxItems: 4 280 - if: 281 properties: 282 function: 283 const: uart 284 then: 285 properties: 286 groups: 287 items: 288 enum: [wm_uart_0, uart2_0, net_wo0_uart_txd_0, 289 net_wo0_uart_txd_1, net_wo0_uart_txd_2, uart1_0, 290 uart1_1, uart2_1, wm_aurt_1, wm_aurt_2, uart0] 291 - if: 292 properties: 293 function: 294 const: watchdog 295 then: 296 properties: 297 groups: 298 enum: [watchdog] 299 - if: 300 properties: 301 function: 302 const: flash 303 then: 304 properties: 305 groups: 306 items: 307 enum: [emmc_45, snfi] 308 maxItems: 1 309 - if: 310 properties: 311 function: 312 const: pcie 313 then: 314 properties: 315 groups: 316 items: 317 enum: [pcie_clk, pcie_wake, pcie_pereset] 318 maxItems: 3 319 320 '^.*conf.*$': 321 type: object 322 additionalProperties: false 323 description: pinconf configuration nodes. 324 $ref: /schemas/pinctrl/pincfg-node.yaml 325 326 properties: 327 pins: 328 description: 329 An array of strings. Each string contains the name of a pin. 330 items: 331 enum: [GPIO_WPS, GPIO_RESET, SYS_WATCHDOG, PCIE_PERESET_N, 332 JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N, 333 WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK, 334 WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI, 335 SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, 336 SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, 337 SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ, 338 PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET, 339 WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK, 340 WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0, 341 WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10] 342 maxItems: 57 343 344 bias-disable: true 345 346 bias-pull-up: 347 oneOf: 348 - type: boolean 349 description: normal pull up. 350 - enum: [100, 101, 102, 103] 351 description: > 352 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 353 dt-bindings/pinctrl/mt65xx.h. 354 355 bias-pull-down: 356 oneOf: 357 - type: boolean 358 description: normal pull down. 359 - enum: [100, 101, 102, 103] 360 description: > 361 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 362 dt-bindings/pinctrl/mt65xx.h. 363 364 input-enable: true 365 366 input-disable: true 367 368 output-enable: true 369 370 output-low: true 371 372 output-high: true 373 374 input-schmitt-enable: true 375 376 input-schmitt-disable: true 377 378 drive-strength: 379 enum: [2, 4, 6, 8, 10, 12, 14, 16] 380 381 mediatek,pull-up-adv: 382 description: | 383 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 384 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments 385 are described as below: 386 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 387 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 388 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 389 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 390 $ref: /schemas/types.yaml#/definitions/uint32 391 enum: [0, 1, 2, 3] 392 393 mediatek,pull-down-adv: 394 description: | 395 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 396 Pull down setings for 2 pull resistors, R0 and R1. Valid arguments 397 are described as below: 398 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 399 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 400 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 401 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 402 $ref: /schemas/types.yaml#/definitions/uint32 403 enum: [0, 1, 2, 3] 404 405 required: 406 - pins 407 408additionalProperties: false 409 410examples: 411 - | 412 #include <dt-bindings/interrupt-controller/irq.h> 413 #include <dt-bindings/interrupt-controller/arm-gic.h> 414 #include <dt-bindings/pinctrl/mt65xx.h> 415 416 soc { 417 #address-cells = <2>; 418 #size-cells = <2>; 419 pio: pinctrl@11d00000 { 420 compatible = "mediatek,mt7981-pinctrl"; 421 reg = <0 0x11d00000 0 0x1000>, 422 <0 0x11c00000 0 0x1000>, 423 <0 0x11c10000 0 0x1000>, 424 <0 0x11d20000 0 0x1000>, 425 <0 0x11e00000 0 0x1000>, 426 <0 0x11e20000 0 0x1000>, 427 <0 0x11f00000 0 0x1000>, 428 <0 0x11f10000 0 0x1000>, 429 <0 0x1000b000 0 0x1000>; 430 reg-names = "gpio", "iocfg_rt", "iocfg_rm", 431 "iocfg_rb", "iocfg_lb", "iocfg_bl", 432 "iocfg_tm", "iocfg_tl", "eint"; 433 gpio-controller; 434 #gpio-cells = <2>; 435 gpio-ranges = <&pio 0 0 56>; 436 interrupt-controller; 437 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 438 interrupt-parent = <&gic>; 439 #interrupt-cells = <2>; 440 441 mdio_pins: mdio-pins { 442 mux { 443 function = "eth"; 444 groups = "smi_mdc_mdio"; 445 }; 446 }; 447 448 spi0_flash_pins: spi0-pins { 449 mux { 450 function = "spi"; 451 groups = "spi0", "spi0_wp_hold"; 452 }; 453 454 conf-pu { 455 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; 456 drive-strength = <MTK_DRIVE_8mA>; 457 bias-pull-up = <MTK_PUPD_SET_R1R0_11>; 458 }; 459 460 conf-pd { 461 pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; 462 drive-strength = <MTK_DRIVE_8mA>; 463 bias-pull-down = <MTK_PUPD_SET_R1R0_11>; 464 }; 465 }; 466 467 pcie_pins: pcie-pins { 468 mux { 469 function = "pcie"; 470 groups = "pcie_clk", "pcie_wake", "pcie_pereset"; 471 }; 472 }; 473 474 }; 475 }; 476