1Tegra124 SOCTHERM thermal management system
2
3The SOCTHERM IP block contains thermal sensors, support for polled
4or interrupt-based thermal monitoring, CPU and GPU throttling based
5on temperature trip points, and handling external overcurrent
6notifications. It is also used to manage emergency shutdown in an
7overheating situation.
8
9Required properties :
10- compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11  For Tegra132, must contain "nvidia,tegra132-soctherm".
12  For Tegra210, must contain "nvidia,tegra210-soctherm".
13- reg : Should contain at least 2 entries for each entry in reg-names:
14  - SOCTHERM register set
15  - Tegra CAR register set: Required for Tegra124 and Tegra210.
16  - CCROC register set: Required for Tegra132.
17- reg-names :  Should contain at least 2 entries:
18  - soctherm-reg
19  - car-reg
20  - ccroc-reg
21- interrupts : Defines the interrupt used by SOCTHERM
22- clocks : Must contain an entry for each entry in clock-names.
23  See ../clocks/clock-bindings.txt for details.
24- clock-names : Must include the following entries:
25  - tsensor
26  - soctherm
27- resets : Must contain an entry for each entry in reset-names.
28  See ../reset/reset.txt for details.
29- reset-names : Must include the following entries:
30  - soctherm
31- #thermal-sensor-cells : Should be 1. For a description of this property, see
32     Documentation/devicetree/bindings/thermal/thermal-sensor.yaml.
33    See <dt-bindings/thermal/tegra124-soctherm.h> for a list of valid values
34    when referring to thermal sensors.
35- throttle-cfgs: A sub-node which is a container of configuration for each
36    hardware throttle events. These events can be set as cooling devices.
37  * throttle events: Sub-nodes must be named as "light" or "heavy".
38      Properties:
39      - nvidia,priority: Each throttles has its own throttle settings, so the
40        SW need to set priorities for various throttle, the HW arbiter can select
41        the final throttle settings.
42        Bigger value indicates higher priority, In general, higher priority
43        translates to lower target frequency. SW needs to ensure that critical
44        thermal alarms are given higher priority, and ensure that there is
45        no race if priority of two vectors is set to the same value.
46        The range of this value is 1~100.
47      - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
48        It is the throttling depth of pulse skippers, it's the percentage
49        throttling.
50      - nvidia,cpu-throt-level: This property is only for Tegra132, it is the
51        level of pulse skippers, which used to throttle clock frequencies. It
52        indicates cpu clock throttling depth, and the depth can be programmed.
53        Must set as following values:
54        TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
55        TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
56      - nvidia,gpu-throt-level: This property is for Tegra124 and Tegra210.
57        It is the level of pulse skippers, which used to throttle clock
58        frequencies. It indicates gpu clock throttling depth and can be
59        programmed to any of the following values which represent a throttling
60        percentage:
61        TEGRA_SOCTHERM_THROT_LEVEL_NONE (0%)
62        TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%),
63        TEGRA_SOCTHERM_THROT_LEVEL_MED (75%),
64        TEGRA_SOCTHERM_THROT_LEVEL_HIGH (85%).
65      - #cooling-cells: Should be 1. This cooling device only support on/off state.
66        For a description of this property see:
67	Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
68
69      Optional properties: The following properties are T210 specific and
70      valid only for OCx throttle events.
71      - nvidia,count-threshold: Specifies the number of OC events that are
72        required for triggering an interrupt. Interrupts are not triggered if
73        the property is missing. A value of 0 will interrupt on every OC alarm.
74      - nvidia,polarity-active-low: Configures the polarity of the OC alaram
75        signal. If present, this means assert low, otherwise assert high.
76      - nvidia,alarm-filter: Number of clocks to filter event. When the filter
77        expires (which means the OC event has not occurred for a long time),
78        the counter is cleared and filter is rearmed. Default value is 0.
79      - nvidia,throttle-period-us: Specifies the number of uSec for which
80        throttling is engaged after the OC event is deasserted. Default value
81        is 0.
82
83Optional properties:
84- nvidia,thermtrips : When present, this property specifies the temperature at
85  which the soctherm hardware will assert the thermal trigger signal to the
86  Power Management IC, which can be configured to reset or shutdown the device.
87  It is an array of pairs where each pair represents a tsensor id followed by a
88  temperature in milli Celcius. In the absence of this property the critical
89  trip point will be used for thermtrip temperature.
90
91Note:
92- the "critical" type trip points will be used to set the temperature at which
93the SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips"
94property is missing. When the thermtrips property is present, the breach of a
95critical trip point is reported back to the thermal framework to implement
96software shutdown.
97
98- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
99temperature. Once the temperature of this thermal zone is higher
100than it, it will trigger the HW throttle event.
101
102Example :
103
104	soctherm@700e2000 {
105		compatible = "nvidia,tegra124-soctherm";
106		reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
107			0x0 0x60006000 0x0 0x400 /* CAR reg_base */
108		reg-names = "soctherm-reg", "car-reg";
109		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
110		clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
111			<&tegra_car TEGRA124_CLK_SOC_THERM>;
112		clock-names = "tsensor", "soctherm";
113		resets = <&tegra_car 78>;
114		reset-names = "soctherm";
115
116		#thermal-sensor-cells = <1>;
117
118		nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500
119				     TEGRA124_SOCTHERM_SENSOR_GPU 103000>;
120
121		throttle-cfgs {
122			/*
123			 * When the "heavy" cooling device triggered,
124			 * the HW will skip cpu clock's pulse in 85% depth,
125			 * skip gpu clock's pulse in 85% level
126			 */
127			throttle_heavy: heavy {
128				nvidia,priority = <100>;
129				nvidia,cpu-throt-percent = <85>;
130				nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
131
132				#cooling-cells = <1>;
133			};
134
135			/*
136			 * When the "light" cooling device triggered,
137			 * the HW will skip cpu clock's pulse in 50% depth,
138			 * skip gpu clock's pulse in 50% level
139			 */
140			throttle_light: light {
141				nvidia,priority = <80>;
142				nvidia,cpu-throt-percent = <50>;
143				nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>;
144
145				#cooling-cells = <1>;
146			};
147
148			/*
149			 * If these two devices are triggered in same time, the HW throttle
150			 * arbiter will select the highest priority as the final throttle
151			 * settings to skip cpu pulse.
152			 */
153
154			throttle_oc1: oc1 {
155				nvidia,priority = <50>;
156				nvidia,polarity-active-low;
157				nvidia,count-threshold = <100>;
158				nvidia,alarm-filter = <5100000>;
159				nvidia,throttle-period-us = <0>;
160				nvidia,cpu-throt-percent = <75>;
161				nvidia,gpu-throt-level =
162						<TEGRA_SOCTHERM_THROT_LEVEL_MED>;
163                        };
164		};
165	};
166
167Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
168
169	soctherm@700e2000 {
170		compatible = "nvidia,tegra132-soctherm";
171		reg = <0x0 0x700e2000 0x0 0x600  /* SOC_THERM reg_base */
172			0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
173		reg-names = "soctherm-reg", "ccroc-reg";
174
175		throttle-cfgs {
176			/*
177			 * When the "heavy" cooling device triggered,
178			 * the HW will skip cpu clock's pulse in HIGH level
179			 */
180			throttle_heavy: heavy {
181				nvidia,priority = <100>;
182				nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
183
184				#cooling-cells = <1>;
185			};
186
187			/*
188			 * When the "light" cooling device triggered,
189			 * the HW will skip cpu clock's pulse in MED level
190			 */
191			throttle_light: light {
192				nvidia,priority = <80>;
193				nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
194
195				#cooling-cells = <1>;
196			};
197
198			/*
199			 * If these two devices are triggered in same time, the HW throttle
200			 * arbiter will select the highest priority as the final throttle
201			 * settings to skip cpu pulse.
202			 */
203
204		};
205	};
206
207Example: referring to thermal sensors :
208
209       thermal-zones {
210                cpu {
211                        polling-delay-passive = <1000>;
212                        polling-delay = <1000>;
213
214                        thermal-sensors =
215                                <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
216
217			trips {
218				cpu_shutdown_trip: shutdown-trip {
219					temperature = <102500>;
220					hysteresis = <1000>;
221					type = "critical";
222				};
223
224				cpu_throttle_trip: throttle-trip {
225					temperature = <100000>;
226					hysteresis = <1000>;
227					type = "hot";
228				};
229			};
230
231			cooling-maps {
232				map0 {
233					trip = <&cpu_throttle_trip>;
234					cooling-device = <&throttle_heavy 1 1>;
235				};
236			};
237                };
238	};
239