1========================
2Kernel driver w1_ds28e04
3========================
4
5Supported chips:
6
7  * Maxim DS28E04-100 4096-Bit Addressable 1-Wire EEPROM with PIO
8
9supported family codes:
10
11        =================	====
12	W1_FAMILY_DS28E04	0x1C
13        =================	====
14
15Author: Markus Franke, <franke.m@sebakmt.com> <franm@hrz.tu-chemnitz.de>
16
17Description
18-----------
19
20Support is provided through the sysfs files "eeprom" and "pio". CRC checking
21during memory accesses can optionally be enabled/disabled via the device
22attribute "crccheck". The strong pull-up can optionally be enabled/disabled
23via the module parameter "w1_strong_pullup".
24
25Memory Access
26
27	A read operation on the "eeprom" file reads the given amount of bytes
28	from the EEPROM of the DS28E04.
29
30	A write operation on the "eeprom" file writes the given byte sequence
31	to the EEPROM of the DS28E04. If CRC checking mode is enabled only
32	fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30
33	and 31) are allowed to be written.
34
35PIO Access
36
37	The 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.
38
39	The current status of the PIO's is returned as an 8 bit value. Bit 0/1
40	represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are
41	driven low-active, i.e. the driver delivers/expects low-active values.
42