1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2022 Broadcom Ltd. 4 */ 5 6#include <dt-bindings/interrupt-controller/arm-gic.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8 9/ { 10 compatible = "brcm,bcm6846", "brcm,bcmbca"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 14 interrupt-parent = <&gic>; 15 16 cpus { 17 #address-cells = <1>; 18 #size-cells = <0>; 19 20 CA7_0: cpu@0 { 21 device_type = "cpu"; 22 compatible = "arm,cortex-a7"; 23 reg = <0x0>; 24 next-level-cache = <&L2_0>; 25 enable-method = "psci"; 26 }; 27 28 CA7_1: cpu@1 { 29 device_type = "cpu"; 30 compatible = "arm,cortex-a7"; 31 reg = <0x1>; 32 next-level-cache = <&L2_0>; 33 enable-method = "psci"; 34 }; 35 36 L2_0: l2-cache0 { 37 compatible = "cache"; 38 cache-level = <2>; 39 }; 40 }; 41 42 timer { 43 compatible = "arm,armv7-timer"; 44 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 45 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 46 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 47 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 48 arm,cpu-registers-not-fw-configured; 49 }; 50 51 pmu: pmu { 52 compatible = "arm,cortex-a7-pmu"; 53 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 54 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 55 interrupt-affinity = <&CA7_0>, <&CA7_1>; 56 }; 57 58 clocks: clocks { 59 periph_clk: periph-clk { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <200000000>; 63 }; 64 }; 65 66 psci { 67 compatible = "arm,psci-0.2"; 68 method = "smc"; 69 }; 70 71 axi@81000000 { 72 compatible = "simple-bus"; 73 #address-cells = <1>; 74 #size-cells = <1>; 75 ranges = <0 0x81000000 0x8000>; 76 77 gic: interrupt-controller@1000 { 78 compatible = "arm,cortex-a7-gic"; 79 #interrupt-cells = <3>; 80 interrupt-controller; 81 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 82 reg = <0x1000 0x1000>, 83 <0x2000 0x2000>, 84 <0x4000 0x2000>, 85 <0x6000 0x2000>; 86 }; 87 }; 88 89 bus@ff800000 { 90 compatible = "simple-bus"; 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges = <0 0xff800000 0x800000>; 94 95 uart0: serial@640 { 96 compatible = "brcm,bcm6345-uart"; 97 reg = <0x640 0x1b>; 98 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 99 clocks = <&periph_clk>; 100 clock-names = "refclk"; 101 status = "disabled"; 102 }; 103 }; 104}; 105