1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright (c) 2014 Protonic Holland
4 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include "imx6dl.dtsi"
11
12/ {
13	model = "Plymovent M2M board";
14	compatible = "ply,plym2m", "fsl,imx6dl";
15
16	chosen {
17		stdout-path = &uart4;
18	};
19
20	backlight: backlight {
21		compatible = "pwm-backlight";
22		pwms = <&pwm1 0 5000000 0>;
23		brightness-levels = <0 1000>;
24		num-interpolated-steps = <20>;
25		default-brightness-level = <19>;
26		power-supply = <&reg_12v0>;
27	};
28
29	display {
30		compatible = "fsl,imx-parallel-display";
31		pinctrl-0 = <&pinctrl_ipu1_disp>;
32		pinctrl-names = "default";
33		#address-cells = <1>;
34		#size-cells = <0>;
35
36		port@0 {
37			reg = <0>;
38
39			display_in: endpoint {
40				remote-endpoint = <&ipu1_di0_disp0>;
41			};
42		};
43
44		port@1 {
45			reg = <1>;
46
47			display_out: endpoint {
48				remote-endpoint = <&panel_in>;
49			};
50		};
51	};
52
53	iio-hwmon {
54		compatible = "iio-hwmon";
55		io-channels = <&vdiv_vaccu>;
56	};
57
58	leds {
59		compatible = "gpio-leds";
60		pinctrl-names = "default";
61		pinctrl-0 = <&pinctrl_leds>;
62
63		led-0 {
64			label = "debug0";
65			function = LED_FUNCTION_STATUS;
66			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
67			linux,default-trigger = "heartbeat";
68		};
69	};
70
71	panel {
72		compatible = "edt,etm0700g0bdh6";
73		backlight = <&backlight>;
74		power-supply = <&reg_3v3>;
75
76		port {
77			panel_in: endpoint {
78				remote-endpoint = <&display_out>;
79			};
80		};
81	};
82
83	clk50m_phy: phy-clock {
84		compatible = "fixed-clock";
85		#clock-cells = <0>;
86		clock-frequency = <50000000>;
87	};
88
89	reg_3v3: regulator-3v3 {
90		compatible = "regulator-fixed";
91		regulator-name = "3v3";
92		regulator-min-microvolt = <3300000>;
93		regulator-max-microvolt = <3300000>;
94	};
95
96	reg_5v0: regulator-5v0 {
97		compatible = "regulator-fixed";
98		regulator-name = "5v0";
99		regulator-min-microvolt = <5000000>;
100		regulator-max-microvolt = <5000000>;
101	};
102
103	reg_12v0: regulator-12v0 {
104		compatible = "regulator-fixed";
105		regulator-name = "12v0";
106		regulator-min-microvolt = <12000000>;
107		regulator-max-microvolt = <12000000>;
108	};
109
110	thermal-zones {
111		chassis-thermal {
112			polling-delay = <20000>;
113			polling-delay-passive = <0>;
114			thermal-sensors = <&tsens0>;
115		};
116
117		touch-thermal0 {
118			polling-delay = <20000>;
119			polling-delay-passive = <0>;
120			thermal-sensors = <&touch_temp0>;
121		};
122
123		touch-thermal1 {
124			polling-delay = <20000>;
125			polling-delay-passive = <0>;
126			thermal-sensors = <&touch_temp1>;
127		};
128	};
129
130	touchscreen {
131		compatible = "resistive-adc-touch";
132		io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
133                              <&adc_ts 5>;
134		io-channel-names = "y", "z1", "z2", "x";
135		touchscreen-min-pressure = <64687>;
136		touchscreen-inverted-x;
137		touchscreen-inverted-y;
138		touchscreen-x-plate-ohms = <300>;
139		touchscreen-y-plate-ohms = <800>;
140	};
141
142	touch_temp0: touch-temperature-sensor0 {
143		compatible = "generic-adc-thermal";
144		#thermal-sensor-cells = <0>;
145		io-channels = <&adc_ts 0>;
146		io-channel-names = "sensor-channel";
147		temperature-lookup-table = <    (-40000) 736
148						85000 474>;
149	};
150
151	touch_temp1: touch-temperature-sensor1 {
152		compatible = "generic-adc-thermal";
153		#thermal-sensor-cells = <0>;
154		io-channels = <&adc_ts 7>;
155		io-channel-names = "sensor-channel";
156		temperature-lookup-table = <    (-40000) 826
157						85000 609>;
158	};
159
160	vdiv_vaccu: voltage-divider-vaccu {
161		compatible = "voltage-divider";
162		io-channels = <&adc_ts 2>;
163		output-ohms = <2500>;
164		full-ohms = <64000>;
165		#io-channel-cells = <0>;
166	};
167};
168
169&can1 {
170	pinctrl-names = "default";
171	pinctrl-0 = <&pinctrl_can1>;
172	xceiver-supply = <&reg_5v0>;
173	status = "okay";
174};
175
176&ecspi1 {
177	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
178	pinctrl-names = "default";
179	pinctrl-0 = <&pinctrl_ecspi1>;
180	status = "okay";
181
182	flash@0 {
183		compatible = "jedec,spi-nor";
184		reg = <0>;
185		spi-max-frequency = <20000000>;
186	};
187};
188
189&ecspi2 {
190	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
191	pinctrl-names = "default";
192	pinctrl-0 = <&pinctrl_ecspi2>;
193	status = "okay";
194
195	adc_ts: adc@0 {
196		compatible = "ti,tsc2046e-adc";
197		reg = <0>;
198		pinctrl-0 = <&pinctrl_tsc2046>;
199		pinctrl-names = "default";
200		spi-max-frequency = <1000000>;
201		interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
202		#io-channel-cells = <1>;
203
204		#address-cells = <1>;
205		#size-cells = <0>;
206
207		channel@0 {
208			reg = <0>;
209			settling-time-us = <300>;
210			oversampling-ratio = <5>;
211		};
212
213		channel@1 {
214			reg = <1>;
215			settling-time-us = <700>;
216			oversampling-ratio = <5>;
217		};
218
219		channel@2 {
220			reg = <2>;
221			settling-time-us = <300>;
222			oversampling-ratio = <5>;
223		};
224
225		channel@3 {
226			reg = <3>;
227			settling-time-us = <700>;
228			oversampling-ratio = <5>;
229		};
230
231		channel@4 {
232			reg = <4>;
233			settling-time-us = <700>;
234			oversampling-ratio = <5>;
235		};
236
237		channel@5 {
238			reg = <5>;
239			settling-time-us = <700>;
240			oversampling-ratio = <5>;
241		};
242
243		/* channel 6 is not connected */
244
245		channel@7 {
246			reg = <7>;
247			settling-time-us = <300>;
248			oversampling-ratio = <5>;
249		};
250	};
251};
252
253&fec {
254	pinctrl-names = "default";
255	pinctrl-0 = <&pinctrl_enet>;
256	phy-mode = "rmii";
257	clocks = <&clks IMX6QDL_CLK_ENET>,
258		 <&clks IMX6QDL_CLK_ENET>,
259		 <&clk50m_phy>;
260	clock-names = "ipg", "ahb", "ptp";
261	phy-handle = <&rgmii_phy>;
262	status = "okay";
263
264	mdio {
265		#address-cells = <1>;
266		#size-cells = <0>;
267
268		/* Microchip KSZ8081RNA PHY */
269		rgmii_phy: ethernet-phy@0 {
270			reg = <0>;
271			interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
272			reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
273			reset-assert-us = <10000>;
274			reset-deassert-us = <300>;
275		};
276	};
277};
278
279&gpio1 {
280	gpio-line-names =
281		"CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
282		"DEBUG_0", "", "", "", "", "", "", "",
283		"", "", "", "", "", "", "", "",
284		"", "", "", "", "", "", "", "";
285};
286
287&gpio2 {
288	gpio-line-names =
289		"", "", "", "", "", "", "", "",
290		"", "", "", "", "", "", "", "",
291		"", "", "", "", "", "", "", "",
292		"", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
293};
294
295&gpio3 {
296	gpio-line-names =
297		"", "", "", "", "", "", "", "",
298		"", "", "", "", "", "", "", "",
299		"", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
300		"", "", "", "", "", "", "", "";
301};
302
303&gpio4 {
304	gpio-line-names =
305		"", "", "", "", "", "", "", "",
306		"", "", "", "", "CAN1_SR", "", "", "",
307		"", "", "", "", "", "", "", "",
308		"", "", "", "", "", "", "", "";
309};
310
311&gpio5 {
312	gpio-line-names =
313		"", "", "", "", "", "", "", "",
314		"", "", "", "", "", "", "", "",
315		"", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
316		"", "", "", "", "", "", "", "";
317};
318
319&i2c1 {
320	clock-frequency = <100000>;
321	pinctrl-names = "default";
322	pinctrl-0 = <&pinctrl_i2c1>;
323	status = "okay";
324
325	/* additional i2c devices are added automatically by the boot loader */
326};
327
328&i2c3 {
329	clock-frequency = <100000>;
330	pinctrl-names = "default";
331	pinctrl-0 = <&pinctrl_i2c3>;
332	status = "okay";
333
334	tsens0: temperature-sensor@70 {
335		compatible = "ti,tmp103";
336		reg = <0x70>;
337		#thermal-sensor-cells = <0>;
338	};
339};
340
341&ipu1_di0_disp0 {
342	remote-endpoint = <&display_in>;
343};
344
345&pwm1 {
346	pinctrl-names = "default";
347	pinctrl-0 = <&pinctrl_pwm1>;
348	status = "okay";
349};
350
351&uart4 {
352	pinctrl-names = "default";
353	pinctrl-0 = <&pinctrl_uart4>;
354	status = "okay";
355};
356
357&usbphynop1 {
358	status = "disabled";
359};
360
361&usbphynop2 {
362	status = "disabled";
363};
364
365&usbotg {
366	phy_type = "utmi";
367	dr_mode = "host";
368	disable-over-current;
369	status = "okay";
370};
371
372&usdhc1 {
373	pinctrl-names = "default";
374	pinctrl-0 = <&pinctrl_usdhc1>;
375	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
376	no-1-8-v;
377	disable-wp;
378	cap-sd-highspeed;
379	no-mmc;
380	no-sdio;
381	status = "okay";
382};
383
384&usdhc3 {
385	pinctrl-names = "default";
386	pinctrl-0 = <&pinctrl_usdhc3>;
387	bus-width = <8>;
388	no-1-8-v;
389	non-removable;
390	no-sd;
391	no-sdio;
392	status = "okay";
393};
394
395&iomuxc {
396	pinctrl_can1: can1grp {
397		fsl,pins = <
398			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
399			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
400			/* CAN1_SR */
401			MX6QDL_PAD_KEY_COL3__GPIO4_IO12			0x13008
402			/* CAN1_TERM */
403			MX6QDL_PAD_GPIO_0__GPIO1_IO00			0x1b088
404		>;
405	};
406
407	pinctrl_ecspi1: ecspi1grp {
408		fsl,pins = <
409			MX6QDL_PAD_EIM_D17__ECSPI1_MISO			0x1b000
410			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI			0x3008
411			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK			0x3008
412			/* CS */
413			MX6QDL_PAD_EIM_D19__GPIO3_IO19			0x3008
414		>;
415	};
416
417	pinctrl_ecspi2: ecspi2grp {
418		fsl,pins = <
419			MX6QDL_PAD_EIM_OE__ECSPI2_MISO			0x10000
420			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK			0x3008
421			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI			0x3008
422			/* CS */
423			MX6QDL_PAD_EIM_RW__GPIO2_IO26			0x3008
424		>;
425	};
426
427	pinctrl_enet: enetgrp {
428		fsl,pins = <
429			/* MX6QDL_ENET_PINGRP4 */
430			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b0b0
431			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b0b0
432			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0		0x1b0b0
433			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1		0x1b0b0
434			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER		0x1b0b0
435			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN		0x1b0b0
436			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0		0x1b0b0
437			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1		0x1b0b0
438			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN		0x1b0b0
439
440			MX6QDL_PAD_GPIO_16__ENET_REF_CLK		0x1b0b0
441			/* Phy reset */
442			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22		0x1b0b0
443			/* nINTRP */
444			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23		0x1b0b0
445		>;
446	};
447
448	pinctrl_i2c1: i2c1grp {
449		fsl,pins = <
450			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA			0x4001f8b1
451			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL			0x4001f8b1
452		>;
453	};
454
455	pinctrl_i2c3: i2c3grp {
456		fsl,pins = <
457			MX6QDL_PAD_GPIO_5__I2C3_SCL			0x4001b8b1
458			MX6QDL_PAD_GPIO_6__I2C3_SDA			0x4001b8b1
459		>;
460	};
461
462	pinctrl_ipu1_disp: ipudisp1grp {
463		fsl,pins = <
464			/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
465			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x30
466			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x30
467			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x30
468			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x30
469			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x30
470			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x30
471			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x30
472			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x30
473			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x30
474			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x30
475			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x30
476			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x30
477			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x30
478			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x30
479			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x30
480			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x30
481			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x30
482			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x30
483			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x30
484			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x30
485			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x30
486			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x30
487		>;
488	};
489
490	pinctrl_leds: ledsgrp {
491		fsl,pins = <
492			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x1b0b0
493		>;
494	};
495
496	pinctrl_pwm1: pwm1grp {
497		fsl,pins = <
498			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x8
499		>;
500	};
501
502	pinctrl_tsc2046: tsc2046grp {
503		fsl,pins = <
504			/* TSC_PENIRQ */
505			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x1b0b1
506			/* TSC_BUSY */
507			MX6QDL_PAD_EIM_EB2__GPIO2_IO30			0x1b0b0
508		>;
509	};
510
511	pinctrl_uart4: uart4grp {
512		fsl,pins = <
513			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
514			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
515		>;
516	};
517
518	pinctrl_usdhc1: usdhc1grp {
519		fsl,pins = <
520			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
521			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
522			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
523			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
524			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
525			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
526			MX6QDL_PAD_GPIO_1__GPIO1_IO01			0x1b0b0
527		>;
528	};
529
530	pinctrl_usdhc3: usdhc3grp {
531		fsl,pins = <
532			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
533			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
534			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
535			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
536			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
537			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
538			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
539			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
540			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
541			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
542			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
543		>;
544	};
545};
546