1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Keystone 2 Edison EVM device tree
4 *
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
6 */
7/dts-v1/;
8
9#include "keystone.dtsi"
10#include "keystone-k2e.dtsi"
11
12/ {
13	compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
14	model = "Texas Instruments Keystone 2 Edison EVM";
15
16	reserved-memory {
17		#address-cells = <2>;
18		#size-cells = <2>;
19		ranges;
20
21		dsp_common_memory: dsp-common-memory@81f800000 {
22			compatible = "shared-dma-pool";
23			reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
24			reusable;
25			status = "okay";
26		};
27	};
28};
29
30&soc0 {
31
32		clocks {
33			refclksys: refclksys {
34				#clock-cells = <0>;
35				compatible = "fixed-clock";
36				clock-frequency = <100000000>;
37				clock-output-names = "refclk-sys";
38			};
39
40			refclkpass: refclkpass {
41				#clock-cells = <0>;
42				compatible = "fixed-clock";
43				clock-frequency = <100000000>;
44				clock-output-names = "refclk-pass";
45			};
46
47			refclkddr3a: refclkddr3a {
48				#clock-cells = <0>;
49				compatible = "fixed-clock";
50				clock-frequency = <100000000>;
51				clock-output-names = "refclk-ddr3a";
52			};
53		};
54};
55
56&usb_phy {
57	status = "okay";
58};
59
60&keystone_usb0 {
61	status = "okay";
62};
63
64&usb0 {
65	dr_mode = "host";
66};
67
68&usb1_phy {
69	status = "okay";
70};
71
72&keystone_usb1 {
73	status = "okay";
74};
75
76&usb1 {
77	dr_mode = "peripheral";
78};
79
80&i2c0 {
81	dtt@50 {
82		compatible = "atmel,24c1024";
83		reg = <0x50>;
84	};
85};
86
87&aemif {
88	cs0 {
89		#address-cells = <2>;
90		#size-cells = <1>;
91		clock-ranges;
92		ranges;
93
94		ti,cs-chipselect = <0>;
95		/* all timings in nanoseconds */
96		ti,cs-min-turnaround-ns = <12>;
97		ti,cs-read-hold-ns = <6>;
98		ti,cs-read-strobe-ns = <23>;
99		ti,cs-read-setup-ns = <9>;
100		ti,cs-write-hold-ns = <8>;
101		ti,cs-write-strobe-ns = <23>;
102		ti,cs-write-setup-ns = <8>;
103
104		nand@0,0 {
105			compatible = "ti,keystone-nand","ti,davinci-nand";
106			#address-cells = <1>;
107			#size-cells = <1>;
108			reg = <0 0 0x4000000
109			       1 0 0x0000100>;
110
111			ti,davinci-chipselect = <0>;
112			ti,davinci-mask-ale = <0x2000>;
113			ti,davinci-mask-cle = <0x4000>;
114			ti,davinci-mask-chipsel = <0>;
115			nand-ecc-mode = "hw";
116			ti,davinci-ecc-bits = <4>;
117			nand-on-flash-bbt;
118
119			partition@0 {
120				label = "u-boot";
121				reg = <0x0 0x100000>;
122				read-only;
123			};
124
125			partition@100000 {
126				label = "params";
127				reg = <0x100000 0x80000>;
128				read-only;
129			};
130
131			partition@180000 {
132				label = "ubifs";
133				reg = <0x180000 0x1FE80000>;
134			};
135		};
136	};
137};
138
139&spi0 {
140	nor_flash: flash@0 {
141		#address-cells = <1>;
142		#size-cells = <1>;
143		compatible = "micron,n25q128a11", "jedec,spi-nor";
144		spi-max-frequency = <54000000>;
145		m25p,fast-read;
146		reg = <0>;
147
148		partition@0 {
149			label = "u-boot-spl";
150			reg = <0x0 0x80000>;
151			read-only;
152		};
153
154		partition@1 {
155			label = "misc";
156			reg = <0x80000 0xf80000>;
157		};
158	};
159};
160
161&mdio {
162	status = "ok";
163	ethphy0: ethernet-phy@0 {
164		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
165		reg = <0>;
166	};
167
168	ethphy1: ethernet-phy@1 {
169		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
170		reg = <1>;
171	};
172};
173
174&dsp0 {
175	memory-region = <&dsp_common_memory>;
176	status = "okay";
177};
178