1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for K2G SOC
4 *
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
6 */
7
8#include <dt-bindings/interrupt-controller/arm-gic.h>
9#include <dt-bindings/pinctrl/keystone.h>
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	compatible = "ti,k2g","ti,keystone";
14	model = "Texas Instruments K2G SoC";
15	#address-cells = <2>;
16	#size-cells = <2>;
17	interrupt-parent = <&gic>;
18
19	chosen { };
20
21	aliases {
22		serial0 = &uart0;
23		serial1 = &uart1;
24		serial2 = &uart2;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		rproc0 = &dsp0;
29	};
30
31	cpus {
32		#address-cells = <1>;
33		#size-cells = <0>;
34
35		cpu@0 {
36			compatible = "arm,cortex-a15";
37			device_type = "cpu";
38			reg = <0>;
39		};
40	};
41
42	gic: interrupt-controller@2561000 {
43		compatible = "arm,gic-400", "arm,cortex-a15-gic";
44		#interrupt-cells = <3>;
45		interrupt-controller;
46		reg = <0x0 0x02561000 0x0 0x1000>,
47		      <0x0 0x02562000 0x0 0x2000>,
48		      <0x0 0x02564000 0x0 0x2000>,
49		      <0x0 0x02566000 0x0 0x2000>;
50		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
51				IRQ_TYPE_LEVEL_HIGH)>;
52	};
53
54	timer {
55		compatible = "arm,armv7-timer";
56		interrupts =
57			<GIC_PPI 13
58				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
59			<GIC_PPI 14
60				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
61			<GIC_PPI 11
62				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
63			<GIC_PPI 10
64				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
65	};
66
67	pmu {
68		compatible = "arm,cortex-a15-pmu";
69		interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
70	};
71
72	usbphy {
73		#address-cells = <1>;
74		#size-cells = <0>;
75		compatible = "simple-bus";
76
77		usb0_phy: usb-phy@0 {
78			compatible = "usb-nop-xceiv";
79			reg = <0>;
80			status = "disabled";
81		};
82
83		usb1_phy: usb-phy@1 {
84			compatible = "usb-nop-xceiv";
85			reg = <1>;
86			status = "disabled";
87		};
88	};
89
90	soc0: soc@0 {
91		#address-cells = <1>;
92		#size-cells = <1>;
93		#pinctrl-cells = <1>;
94		compatible = "ti,keystone","simple-bus";
95		ranges = <0x0 0x0 0x0 0xc0000000>;
96		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
97
98		msm_ram: sram@c000000 {
99			compatible = "mmio-sram";
100			reg = <0x0c000000 0x100000>;
101			ranges = <0x0 0x0c000000 0x100000>;
102			#address-cells = <1>;
103			#size-cells = <1>;
104
105			bm-sram@f7000 {
106				reg = <0x000f7000 0x8000>;
107			};
108		};
109
110		k2g_pinctrl: pinmux@2621000 {
111			compatible = "pinctrl-single";
112			reg = <0x02621000 0x410>;
113			pinctrl-single,register-width = <32>;
114			pinctrl-single,function-mask = <0x001b0007>;
115		};
116
117		devctrl: device-state-control@2620000 {
118			compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
119			reg = <0x02620000 0x1000>;
120			#address-cells = <1>;
121			#size-cells = <1>;
122			ranges = <0x0 0x02620000 0x1000>;
123
124			kirq0: keystone_irq@2a0 {
125				compatible = "ti,keystone-irq";
126				reg = <0x2a0 0x10>;
127				interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
128				interrupt-controller;
129				#interrupt-cells = <1>;
130				ti,syscon-dev = <&devctrl 0x2a0>;
131			};
132
133			dspgpio0: keystone_dsp_gpio@240 {
134				compatible = "ti,keystone-dsp-gpio";
135				reg = <0x240 0x4>;
136				gpio-controller;
137				#gpio-cells = <2>;
138				gpio,syscon-dev = <&devctrl 0x240>;
139			};
140		};
141
142		uart0: serial@2530c00 {
143			compatible = "ti,da830-uart", "ns16550a";
144			current-speed = <115200>;
145			reg-shift = <2>;
146			reg-io-width = <4>;
147			reg = <0x02530c00 0x100>;
148			interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
149			clocks = <&k2g_clks 0x2c 0>;
150			power-domains = <&k2g_pds 0x2c>;
151			status = "disabled";
152		};
153
154		uart1: serial@2531000 {
155			compatible = "ti,da830-uart", "ns16550a";
156			current-speed = <115200>;
157			reg-shift = <2>;
158			reg-io-width = <4>;
159			reg = <0x02531000 0x100>;
160			interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>;
161			clocks = <&k2g_clks 0x2d 0>;
162			power-domains = <&k2g_pds 0x2d>;
163			status = "disabled";
164		};
165
166		uart2: serial@2531400 {
167			compatible = "ti,da830-uart", "ns16550a";
168			current-speed = <115200>;
169			reg-shift = <2>;
170			reg-io-width = <4>;
171			reg = <0x02531400 0x100>;
172			interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
173			clocks = <&k2g_clks 0x2e 0>;
174			power-domains = <&k2g_pds 0x2e>;
175			status = "disabled";
176		};
177
178		dcan0: can@260b200 {
179			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
180			reg = <0x0260B200 0x200>;
181			interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
182			status = "disabled";
183			power-domains = <&k2g_pds 0x0008>;
184			clocks = <&k2g_clks 0x0008 1>;
185		};
186
187		dcan1: can@260b400 {
188			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
189			reg = <0x0260B400 0x200>;
190			interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
191			status = "disabled";
192			power-domains = <&k2g_pds 0x0009>;
193			clocks = <&k2g_clks 0x0009 1>;
194		};
195
196		i2c0: i2c@2530000 {
197			compatible = "ti,keystone-i2c";
198			reg = <0x02530000 0x400>;
199			clocks = <&k2g_clks 0x003a 0>;
200			power-domains = <&k2g_pds 0x003a>;
201			interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
202			#address-cells = <1>;
203			#size-cells = <0>;
204			status = "disabled";
205		};
206
207		i2c1: i2c@2530400 {
208			compatible = "ti,keystone-i2c";
209			reg = <0x02530400 0x400>;
210			clocks = <&k2g_clks 0x003b 0>;
211			power-domains = <&k2g_pds 0x003b>;
212			interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
213			#address-cells = <1>;
214			#size-cells = <0>;
215			status = "disabled";
216		};
217
218		i2c2: i2c@2530800 {
219			compatible = "ti,keystone-i2c";
220			reg = <0x02530800 0x400>;
221			clocks = <&k2g_clks 0x003c 0>;
222			power-domains = <&k2g_pds 0x003c>;
223			interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
224			#address-cells = <1>;
225			#size-cells = <0>;
226			status = "disabled";
227		};
228
229		dsp0: dsp@10800000 {
230			compatible = "ti,k2g-dsp";
231			reg = <0x10800000 0x00100000>,
232			      <0x10e00000 0x00008000>,
233			      <0x10f00000 0x00008000>;
234			reg-names = "l2sram", "l1pram", "l1dram";
235			power-domains = <&k2g_pds 0x0046>;
236			ti,syscon-dev = <&devctrl 0x844>;
237			resets = <&k2g_reset 0x0046 0x1>;
238			interrupt-parent = <&kirq0>;
239			interrupts = <0 8>;
240			interrupt-names = "vring", "exception";
241			kick-gpios = <&dspgpio0 27 0>;
242			status = "disabled";
243		};
244
245		msgmgr: mailbox@2a00000 {
246			compatible = "ti,k2g-message-manager";
247			#mbox-cells = <2>;
248			reg-names = "queue_proxy_region",
249				    "queue_state_debug_region";
250			reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
251			interrupt-names = "rx_005",
252					  "rx_057";
253			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
254				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
255		};
256
257		pmmc: system-controller@2921c00 {
258			compatible = "ti,k2g-sci";
259			/*
260			 * In case of rare platforms that does not use k2g as
261			 * system master, use /delete-property/
262			 */
263			ti,system-reboot-controller;
264			mbox-names = "rx", "tx";
265			mboxes = <&msgmgr 5 2>,
266				<&msgmgr 0 0>;
267			reg-names = "debug_messages";
268			reg = <0x02921c00 0x400>;
269
270			k2g_pds: power-controller {
271				compatible = "ti,sci-pm-domain";
272				#power-domain-cells = <1>;
273			};
274
275			k2g_clks: clock-controller {
276				compatible = "ti,k2g-sci-clk";
277				#clock-cells = <2>;
278			};
279
280			k2g_reset: reset-controller {
281				compatible = "ti,sci-reset";
282				#reset-cells = <2>;
283			};
284		};
285
286		gpio0: gpio@2603000 {
287			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
288			reg = <0x02603000 0x100>;
289			gpio-controller;
290			#gpio-cells = <2>;
291
292			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
293					<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
294					<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
295					<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
296					<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
297					<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
298					<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
299					<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
300					<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
301			interrupt-controller;
302			#interrupt-cells = <2>;
303			ti,ngpio = <144>;
304			ti,davinci-gpio-unbanked = <0>;
305			clocks = <&k2g_clks 0x001b 0x0>;
306			clock-names = "gpio";
307		};
308
309		gpio1: gpio@260a000 {
310			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
311			reg = <0x0260a000 0x100>;
312			gpio-controller;
313			#gpio-cells = <2>;
314			interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
315					<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
316					<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
317					<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
318					<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
319			interrupt-controller;
320			#interrupt-cells = <2>;
321			ti,ngpio = <68>;
322			ti,davinci-gpio-unbanked = <0>;
323			clocks = <&k2g_clks 0x001c 0x0>;
324			clock-names = "gpio";
325		};
326
327		dss: dss@02540000 {
328			compatible = "ti,k2g-dss";
329			reg = <0x02540000 0x400>,
330				<0x02550000 0x1000>,
331				<0x02557000 0x1000>,
332				<0x0255a800 0x100>,
333				<0x0255ac00 0x100>;
334			reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
335			clocks = <&k2g_clks 0x2 0>,
336					<&k2g_clks 0x2 1>;
337			clock-names = "fck", "vp1";
338			interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
339
340			power-domains = <&k2g_pds 0x2>;
341			status = "disabled";
342			#address-cells = <1>;
343			#size-cells = <1>;
344			ranges;
345
346			max-memory-bandwidth = <230000000>;
347		};
348
349		edma0: edma@2700000 {
350			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
351			reg = <0x02700000 0x8000>;
352			reg-names = "edma3_cc";
353			interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
354					<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
355					<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
356			interrupt-names = "edma3_ccint", "emda3_mperr",
357					  "edma3_ccerrint";
358			dma-requests = <64>;
359			#dma-cells = <2>;
360
361			ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
362
363			ti,edma-memcpy-channels = <32 33 34 35>;
364
365			power-domains = <&k2g_pds 0x3f>;
366		};
367
368		edma0_tptc0: tptc@2760000 {
369			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
370			reg = <0x02760000 0x400>;
371			power-domains = <&k2g_pds 0x3f>;
372		};
373
374		edma0_tptc1: tptc@2768000 {
375			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
376			reg = <0x02768000 0x400>;
377			power-domains = <&k2g_pds 0x3f>;
378		};
379
380		edma1: edma@2728000 {
381			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
382			reg = <0x02728000 0x8000>;
383			reg-names = "edma3_cc";
384			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
385					<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
386					<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
387			interrupt-names = "edma3_ccint", "emda3_mperr",
388					  "edma3_ccerrint";
389			dma-requests = <64>;
390			#dma-cells = <2>;
391
392			ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
393
394			/*
395			 * memcpy is disabled, can be enabled with:
396			 * ti,edma-memcpy-channels = <12 13 14 15>;
397			 * for example.
398			 */
399
400			power-domains = <&k2g_pds 0x4f>;
401		};
402
403		edma1_tptc0: tptc@27b0000 {
404			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
405			reg = <0x027b0000 0x400>;
406			power-domains = <&k2g_pds 0x4f>;
407		};
408
409		edma1_tptc1: tptc@27b8000 {
410			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
411			reg = <0x027b8000 0x400>;
412			power-domains = <&k2g_pds 0x4f>;
413		};
414
415		mmc0: mmc@23000000 {
416			compatible = "ti,k2g-sdhci";
417			reg = <0x23000000 0x400>;
418			interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
419			bus-width = <4>;
420			no-1-8-v;
421			max-frequency = <96000000>;
422			power-domains = <&k2g_pds 0xb>;
423			clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
424			clock-names = "fck", "mmchsdb_fck";
425			status = "disabled";
426		};
427
428		mmc1: mmc@23100000 {
429			compatible = "ti,k2g-sdhci";
430			reg = <0x23100000 0x400>;
431			interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
432			bus-width = <8>;
433			no-1-8-v;
434			non-removable;
435			max-frequency = <96000000>;
436			power-domains = <&k2g_pds 0xc>;
437			clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
438			clock-names = "fck", "mmchsdb_fck";
439		};
440
441		qspi: spi@2940000 {
442			compatible = "ti,k2g-qspi", "cdns,qspi-nor";
443			#address-cells = <1>;
444			#size-cells = <0>;
445			reg = <0x02940000 0x1000>,
446			      <0x24000000 0x4000000>;
447			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
448			cdns,fifo-depth = <256>;
449			cdns,fifo-width = <4>;
450			cdns,trigger-address = <0x24000000>;
451			clocks = <&k2g_clks 0x43 0x0>;
452			power-domains = <&k2g_pds 0x43>;
453			status = "disabled";
454		};
455
456		mcasp0: mcasp@2340000 {
457			compatible = "ti,am33xx-mcasp-audio";
458			reg = <0x02340000 0x2000>,
459			      <0x21804000 0x1000>;
460			reg-names = "mpu","dat";
461			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
462				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
463			interrupt-names = "tx", "rx";
464			dmas = <&edma0 24 1>, <&edma0 25 1>;
465			dma-names = "tx", "rx";
466			power-domains = <&k2g_pds 0x4>;
467			clocks = <&k2g_clks 0x4 0>;
468			clock-names = "fck";
469			status = "disabled";
470		};
471
472		mcasp1: mcasp@2342000 {
473			compatible = "ti,am33xx-mcasp-audio";
474			reg = <0x02342000 0x2000>,
475			      <0x21804400 0x1000>;
476			reg-names = "mpu","dat";
477			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
478				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
479			interrupt-names = "tx", "rx";
480			dmas = <&edma1 48 1>, <&edma1 49 1>;
481			dma-names = "tx", "rx";
482			power-domains = <&k2g_pds 0x5>;
483			clocks = <&k2g_clks 0x5 0>;
484			clock-names = "fck";
485			status = "disabled";
486		};
487
488		mcasp2: mcasp@2344000 {
489			compatible = "ti,am33xx-mcasp-audio";
490			reg = <0x02344000 0x2000>,
491			      <0x21804800 0x1000>;
492			reg-names = "mpu","dat";
493			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
494				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
495			interrupt-names = "tx", "rx";
496			dmas = <&edma1 50 1>, <&edma1 51 1>;
497			dma-names = "tx", "rx";
498			power-domains = <&k2g_pds 0x6>;
499			clocks = <&k2g_clks 0x6 0>;
500			clock-names = "fck";
501			status = "disabled";
502		};
503
504		keystone_usb0: keystone-dwc3@2680000 {
505			compatible = "ti,keystone-dwc3";
506			#address-cells = <1>;
507			#size-cells = <1>;
508			reg = <0x2680000 0x10000>;
509			interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
510			ranges;
511			dma-coherent;
512			dma-ranges;
513			status = "disabled";
514			power-domains = <&k2g_pds 0x0016>;
515
516			usb0: usb@2690000 {
517				compatible = "snps,dwc3";
518				reg = <0x2690000 0x10000>;
519				interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
520				maximum-speed = "high-speed";
521				dr_mode = "otg";
522				usb-phy = <&usb0_phy>;
523				status = "disabled";
524			};
525		};
526
527		keystone_usb1: keystone-dwc3@2580000 {
528			compatible = "ti,keystone-dwc3";
529			#address-cells = <1>;
530			#size-cells = <1>;
531			reg = <0x2580000 0x10000>;
532			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
533			ranges;
534			dma-coherent;
535			dma-ranges;
536			status = "disabled";
537			power-domains = <&k2g_pds 0x0017>;
538
539			usb1: usb@2590000 {
540				compatible = "snps,dwc3";
541				reg = <0x2590000 0x10000>;
542				interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
543				maximum-speed = "high-speed";
544				dr_mode = "otg";
545				usb-phy = <&usb1_phy>;
546				status = "disabled";
547			};
548		};
549
550		ecap0: pwm@21d1800 {
551			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
552			#pwm-cells = <3>;
553			reg = <0x021d1800 0x60>;
554			power-domains = <&k2g_pds 0x38>;
555			clocks = <&k2g_clks 0x38 0>;
556			clock-names = "fck";
557			status = "disabled";
558		};
559
560		ecap1: pwm@21d1c00 {
561			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
562			#pwm-cells = <3>;
563			reg = <0x021d1c00 0x60>;
564			power-domains = <&k2g_pds 0x39>;
565			clocks = <&k2g_clks 0x39 0x0>;
566			clock-names = "fck";
567			status = "disabled";
568		};
569
570		spi0: spi@21805400 {
571			compatible = "ti,keystone-spi";
572			reg = <0x21805400 0x200>;
573			num-cs = <4>;
574			ti,davinci-spi-intr-line = <0>;
575			interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
576			#address-cells = <1>;
577			#size-cells = <0>;
578			power-domains = <&k2g_pds 0x0010>;
579			clocks = <&k2g_clks 0x0010 0>;
580		};
581
582		spi1: spi@21805800 {
583			compatible = "ti,keystone-spi";
584			reg = <0x21805800 0x200>;
585			num-cs = <4>;
586			ti,davinci-spi-intr-line = <0>;
587			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
588			#address-cells = <1>;
589			#size-cells = <0>;
590			power-domains = <&k2g_pds 0x0011>;
591			clocks = <&k2g_clks 0x0011 0>;
592		};
593
594		spi2: spi@21805c00 {
595			compatible = "ti,keystone-spi";
596			reg = <0x21805C00 0x200>;
597			num-cs = <4>;
598			ti,davinci-spi-intr-line = <0>;
599			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
600			#address-cells = <1>;
601			#size-cells = <0>;
602			power-domains = <&k2g_pds 0x0012>;
603			clocks = <&k2g_clks 0x0012 0>;
604		};
605
606		spi3: spi@21806000 {
607			compatible = "ti,keystone-spi";
608			reg = <0x21806000 0x200>;
609			num-cs = <4>;
610			ti,davinci-spi-intr-line = <0>;
611			interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
612			#address-cells = <1>;
613			#size-cells = <0>;
614			power-domains = <&k2g_pds 0x0013>;
615			clocks = <&k2g_clks 0x0013 0>;
616		};
617
618		wdt: wdt@02250000 {
619			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
620			reg = <0x02250000 0x80>;
621			power-domains = <&k2g_pds 0x22>;
622			clocks = <&k2g_clks 0x22 0>;
623		};
624
625		emif: emif@21010000 {
626			compatible = "ti,emif-keystone";
627			reg = <0x21010000 0x200>;
628			interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>;
629		};
630
631		mdio: mdio@4200f00 {
632			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
633			reg = <0x04200f00 0x100>;
634			#address-cells = <1>;
635			#size-cells = <0>;
636			clocks = <&k2g_clks 0x0018 3>;
637			clock-names = "fck";
638			power-domains = <&k2g_pds 0x0018>;
639			status = "disabled";
640			bus_freq = <2500000>;
641		};
642		#include "keystone-k2g-netcp.dtsi"
643	};
644};
645