1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common features on the Zoom debug board
4 */
5
6#include "omap-gpmc-smsc911x.dtsi"
7
8&gpmc {
9	ranges = <3 0 0x10000000 0x1000000>,	/* CS3: 16MB for UART */
10		 <7 0 0x2c000000 0x01000000>;
11
12	/*
13	 * Four port TL16CP754C serial port on GPMC,
14	 * they probably share the same GPIO IRQ
15	 * REVISIT: Add timing support from slls644g.pdf
16	 */
17	uart@3,0 {
18		compatible = "ns16550a";
19		reg = <3 0 8>;	/* CS3, offset 0, IO size 8 */
20		bank-width = <2>;
21		reg-shift = <1>;
22		reg-io-width = <1>;
23		interrupt-parent = <&gpio4>;
24		interrupts = <6 IRQ_TYPE_EDGE_RISING>;	/* gpio102 */
25		clock-frequency = <1843200>;
26		current-speed = <115200>;
27		gpmc,mux-add-data = <0>;
28		gpmc,device-width = <1>;
29		gpmc,wait-pin = <1>;
30		gpmc,cycle2cycle-samecsen;
31		gpmc,cycle2cycle-diffcsen;
32		gpmc,cs-on-ns = <5>;
33		gpmc,cs-rd-off-ns = <155>;
34		gpmc,cs-wr-off-ns = <155>;
35		gpmc,adv-on-ns = <15>;
36		gpmc,adv-rd-off-ns = <40>;
37		gpmc,adv-wr-off-ns = <40>;
38		gpmc,oe-on-ns = <45>;
39		gpmc,oe-off-ns = <145>;
40		gpmc,we-on-ns = <45>;
41		gpmc,we-off-ns = <145>;
42		gpmc,rd-cycle-ns = <155>;
43		gpmc,wr-cycle-ns = <155>;
44		gpmc,access-ns = <145>;
45		gpmc,page-burst-access-ns = <20>;
46		gpmc,bus-turnaround-ns = <20>;
47		gpmc,cycle2cycle-delay-ns = <20>;
48		gpmc,wait-monitoring-ns = <0>;
49		gpmc,clk-activation-ns = <0>;
50		gpmc,wr-data-mux-bus-ns = <45>;
51		gpmc,wr-access-ns = <145>;
52	};
53	uart@3,1 {
54		compatible = "ns16550a";
55		reg = <3 0x100 8>;	/* CS3, offset 0x100, IO size 8 */
56		bank-width = <2>;
57		reg-shift = <1>;
58		reg-io-width = <1>;
59		interrupt-parent = <&gpio4>;
60		interrupts = <6 IRQ_TYPE_EDGE_RISING>;	/* gpio102 */
61		clock-frequency = <1843200>;
62		current-speed = <115200>;
63	};
64	uart@3,2 {
65		compatible = "ns16550a";
66		reg = <3 0x200 8>;	/* CS3, offset 0x200, IO size 8 */
67		bank-width = <2>;
68		reg-shift = <1>;
69		reg-io-width = <1>;
70		interrupt-parent = <&gpio4>;
71		interrupts = <6 IRQ_TYPE_EDGE_RISING>;	/* gpio102 */
72		clock-frequency = <1843200>;
73		current-speed = <115200>;
74	};
75	uart@3,3 {
76		compatible = "ns16550a";
77		reg = <3 0x300 8>;	/* CS3, offset 0x300, IO size 8 */
78		bank-width = <2>;
79		reg-shift = <1>;
80		reg-io-width = <1>;
81		interrupt-parent = <&gpio4>;
82		interrupts = <6 IRQ_TYPE_EDGE_RISING>;	/* gpio102 */
83		clock-frequency = <1843200>;
84		current-speed = <115200>;
85	};
86
87	ethernet@gpmc {
88		reg = <7 0 0xff>;
89		interrupt-parent = <&gpio5>;
90		interrupts = <30 IRQ_TYPE_LEVEL_LOW>;	/* gpio158 */
91	};
92};
93