1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
4 * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include "orion5x-mv88f5182.dtsi"
13
14/ {
15	model = "Maxtor Shared Storage II";
16	compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
17
18	memory {
19		device_type = "memory";
20		reg = <0x00000000 0x4000000>; /* 64 MB */
21	};
22
23	chosen {
24		bootargs = "console=ttyS0,115200n8 earlyprintk";
25		stdout-path = &uart0;
26	};
27
28	soc {
29		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
30			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
31			 <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36		pinctrl-0 = <&pmx_buttons>;
37		pinctrl-names = "default";
38		#address-cells = <1>;
39		#size-cells = <0>;
40		power {
41			label = "Power";
42			linux,code = <KEY_POWER>;
43			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
44		};
45
46		reset {
47			label = "Reset";
48			linux,code = <KEY_RESTART>;
49			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
50		};
51	};
52};
53
54&devbus_bootcs {
55	status = "okay";
56
57	devbus,keep-config;
58
59	/*
60	 * Currently the MTD code does not recognize the MX29LV400CBCT
61	 * as a bottom-type device. This could cause risks of
62	 * accidentally erasing critical flash sectors. We thus define
63	 * a single, write-protected partition covering the whole
64	 * flash.  TODO: once the flash part TOP/BOTTOM detection
65	 * issue is sorted out in the MTD code, break this into at
66	 * least three partitions: 'u-boot code', 'u-boot environment'
67	 * and 'whatever is left'.
68	 */
69	flash@0 {
70		compatible = "cfi-flash";
71		reg = <0 0x40000>;
72		bank-width = <1>;
73                #address-cells = <1>;
74		#size-cells = <1>;
75	};
76};
77
78&mdio {
79	status = "okay";
80
81	ethphy: ethernet-phy {
82		reg = <8>;
83	};
84};
85
86&ehci0 {
87	status = "okay";
88};
89
90&eth {
91	status = "okay";
92
93	ethernet-port@0 {
94		phy-handle = <&ethphy>;
95	};
96};
97
98&i2c {
99	status = "okay";
100	clock-frequency = <100000>;
101	#address-cells = <1>;
102
103	rtc@68 {
104		compatible = "st,m41t81";
105		reg = <0x68>;
106		pinctrl-0 = <&pmx_rtc>;
107		pinctrl-names = "default";
108		interrupt-parent = <&gpio0>;
109		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
110	};
111};
112
113&pinctrl {
114	pinctrl-0 = <&pmx_leds &pmx_misc>;
115	pinctrl-names = "default";
116
117	pmx_buttons: pmx-buttons {
118		marvell,pins = "mpp11", "mpp12";
119		marvell,function = "gpio";
120	};
121
122	/*
123	 * MPP0: Power LED
124	 * MPP1: Error LED
125	 */
126	pmx_leds: pmx-leds {
127		marvell,pins = "mpp0", "mpp1";
128		marvell,function = "gpio";
129	};
130
131	/*
132	 * MPP4: HDD ind. (Single/Dual)
133	 * MPP5: HD0 5V control
134	 * MPP6: HD0 12V control
135	 * MPP7: HD1 5V control
136	 * MPP8: HD1 12V control
137	 */
138	pmx_misc: pmx-misc {
139		marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
140		marvell,function = "gpio";
141	};
142
143	pmx_rtc: pmx-rtc {
144		marvell,pins = "mpp3";
145		marvell,function = "gpio";
146	};
147
148	pmx_sata0_led_active: pmx-sata0-led-active {
149		marvell,pins = "mpp14";
150		marvell,function = "sata0";
151	};
152
153	pmx_sata1_led_active: pmx-sata1-led-active {
154		marvell,pins = "mpp15";
155		marvell,function = "sata1";
156	};
157
158	/*
159	 * Non MPP GPIOs:
160	 *  GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
161	 *  GPIO 23: Blue front LED off
162	 *  GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
163	 */
164};
165
166&sata {
167	pinctrl-0 = <&pmx_sata0_led_active
168		     &pmx_sata1_led_active>;
169	pinctrl-names = "default";
170	status = "okay";
171	nr-ports = <2>;
172};
173
174&uart0 {
175	status = "okay";
176};
177