1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2020 HiSilicon Limited.
4 *
5 * DTS file for Hisilicon SD5203 Board
6 */
7
8/dts-v1/;
9
10/ {
11	model = "Hisilicon SD5203";
12	compatible = "H836ASDJ", "hisilicon,sd5203";
13	interrupt-parent = <&vic>;
14	#address-cells = <1>;
15	#size-cells = <1>;
16
17	chosen {
18		bootargs = "console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
19	};
20
21	aliases {
22		serial0 = &uart0;
23	};
24
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28
29		cpu0 {
30			device_type = "cpu";
31			compatible = "arm,arm926ej-s";
32			reg = <0x0>;
33		};
34	};
35
36	memory@30000000 {
37		device_type = "memory";
38		reg = <0x30000000 0x8000000>;
39	};
40
41	soc {
42		#address-cells = <1>;
43		#size-cells = <1>;
44		compatible = "simple-bus";
45		ranges;
46
47		vic: interrupt-controller@10130000 {
48			compatible = "snps,dw-apb-ictl";
49			reg = <0x10130000 0x1000>;
50			interrupt-controller;
51			#interrupt-cells = <1>;
52		};
53
54		refclk125mhz: refclk125mhz {
55			compatible = "fixed-clock";
56			#clock-cells = <0>;
57			clock-frequency = <125000000>;
58		};
59
60		timer0: timer@16002000 {
61			compatible = "arm,sp804", "arm,primecell";
62			reg = <0x16002000 0x1000>;
63			interrupts = <4>;
64			clocks = <&refclk125mhz>;
65			clock-names = "apb_pclk";
66		};
67
68		timer1: timer@16003000 {
69			compatible = "arm,sp804", "arm,primecell";
70			reg = <0x16003000 0x1000>;
71			interrupts = <5>;
72			clocks = <&refclk125mhz>;
73			clock-names = "apb_pclk";
74		};
75
76		uart0: serial@1600d000 {
77			compatible = "snps,dw-apb-uart";
78			reg = <0x1600d000 0x1000>;
79			bus_id = "uart0";
80			clocks = <&refclk125mhz>;
81			clock-names = "baudclk", "apb_pclk";
82			reg-shift = <2>;
83			interrupts = <17>;
84		};
85
86		uart1: serial@1600c000 {
87			compatible = "snps,dw-apb-uart";
88			reg = <0x1600c000 0x1000>;
89			clocks = <&refclk125mhz>;
90			clock-names = "baudclk", "apb_pclk";
91			reg-shift = <2>;
92			interrupts = <16>;
93			status = "disabled";
94		};
95	};
96};
97