1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/input.h>
5#include "tegra124.dtsi"
6
7/ {
8	model = "NVIDIA Tegra124 Venice2";
9	compatible = "nvidia,venice2", "nvidia,tegra124";
10
11	aliases {
12		rtc0 = "/i2c@7000d000/pmic@40";
13		rtc1 = "/rtc@7000e000";
14		serial0 = &uarta;
15	};
16
17	chosen {
18		stdout-path = "serial0:115200n8";
19	};
20
21	memory@80000000 {
22		reg = <0x0 0x80000000 0x0 0x80000000>;
23	};
24
25	host1x@50000000 {
26		hdmi@54280000 {
27			status = "okay";
28
29			vdd-supply = <&vdd_3v3_hdmi>;
30			pll-supply = <&vdd_hdmi_pll>;
31			hdmi-supply = <&vdd_5v0_hdmi>;
32
33			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34			nvidia,hpd-gpio =
35				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36		};
37
38		sor@54540000 {
39			status = "okay";
40
41			avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
42			vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>;
43
44			nvidia,dpaux = <&dpaux>;
45			nvidia,panel = <&panel>;
46		};
47
48		dpaux@545c0000 {
49			vdd-supply = <&vdd_3v3_panel>;
50			status = "okay";
51
52			aux-bus {
53				panel: panel {
54					compatible = "lg,lp129qe";
55					power-supply = <&vdd_3v3_panel>;
56					backlight = <&backlight>;
57				};
58			};
59		};
60	};
61
62	gpu@57000000 {
63		/*
64		 * Node left disabled on purpose - the bootloader will enable
65		 * it after having set the VPR up
66		 */
67		vdd-supply = <&vdd_gpu>;
68	};
69
70	pinmux: pinmux@70000868 {
71		pinctrl-names = "boot";
72		pinctrl-0 = <&pinmux_boot>;
73
74		pinmux_boot: pinmux {
75			dap_mclk1_pw4 {
76				nvidia,pins = "dap_mclk1_pw4";
77				nvidia,function = "extperiph1";
78				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
79				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
80				nvidia,tristate = <TEGRA_PIN_DISABLE>;
81			};
82			dap1_din_pn1 {
83				nvidia,pins = "dap1_din_pn1";
84				nvidia,function = "i2s0";
85				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
87				nvidia,tristate = <TEGRA_PIN_ENABLE>;
88			};
89			dap1_dout_pn2 {
90				nvidia,pins = "dap1_dout_pn2",
91					      "dap1_fs_pn0",
92					      "dap1_sclk_pn3";
93				nvidia,function = "i2s0";
94				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
95				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
96				nvidia,tristate = <TEGRA_PIN_ENABLE>;
97			};
98			dap2_din_pa4 {
99				nvidia,pins = "dap2_din_pa4";
100				nvidia,function = "i2s1";
101				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
102				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
103				nvidia,tristate = <TEGRA_PIN_DISABLE>;
104			};
105			dap2_dout_pa5 {
106				nvidia,pins = "dap2_dout_pa5",
107					      "dap2_fs_pa2",
108					      "dap2_sclk_pa3";
109				nvidia,function = "i2s1";
110				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112				nvidia,tristate = <TEGRA_PIN_DISABLE>;
113			};
114			dvfs_pwm_px0 {
115				nvidia,pins = "dvfs_pwm_px0",
116					      "dvfs_clk_px2";
117				nvidia,function = "cldvfs";
118				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
119				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
120				nvidia,tristate = <TEGRA_PIN_DISABLE>;
121			};
122			ulpi_clk_py0 {
123				nvidia,pins = "ulpi_clk_py0",
124					      "ulpi_nxt_py2",
125					      "ulpi_stp_py3";
126				nvidia,function = "spi1";
127				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
128				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
129				nvidia,tristate = <TEGRA_PIN_DISABLE>;
130			};
131			ulpi_dir_py1 {
132				nvidia,pins = "ulpi_dir_py1";
133				nvidia,function = "spi1";
134				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
136				nvidia,tristate = <TEGRA_PIN_DISABLE>;
137			};
138			cam_i2c_scl_pbb1 {
139				nvidia,pins = "cam_i2c_scl_pbb1",
140					      "cam_i2c_sda_pbb2";
141				nvidia,function = "i2c3";
142				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
143				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
144				nvidia,tristate = <TEGRA_PIN_DISABLE>;
145				nvidia,lock = <TEGRA_PIN_DISABLE>;
146				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
147			};
148			gen2_i2c_scl_pt5 {
149				nvidia,pins = "gen2_i2c_scl_pt5",
150					      "gen2_i2c_sda_pt6";
151				nvidia,function = "i2c2";
152				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
153				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
154				nvidia,tristate = <TEGRA_PIN_DISABLE>;
155				nvidia,lock = <TEGRA_PIN_DISABLE>;
156				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
157			};
158			pg4 {
159				nvidia,pins = "pg4",
160					      "pg5",
161					      "pg6",
162					      "pi3";
163				nvidia,function = "spi4";
164				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
165				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166				nvidia,tristate = <TEGRA_PIN_DISABLE>;
167			};
168			pg7 {
169				nvidia,pins = "pg7";
170				nvidia,function = "spi4";
171				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
172				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
173				nvidia,tristate = <TEGRA_PIN_DISABLE>;
174			};
175			ph1 {
176				nvidia,pins = "ph1";
177				nvidia,function = "pwm1";
178				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
179				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
180				nvidia,tristate = <TEGRA_PIN_DISABLE>;
181			};
182			pk0 {
183				nvidia,pins = "pk0",
184					      "kb_row15_ps7",
185					      "clk_32k_out_pa0";
186				nvidia,function = "soc";
187				nvidia,pull = <TEGRA_PIN_PULL_UP>;
188				nvidia,tristate = <TEGRA_PIN_DISABLE>;
189				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190			};
191			sdmmc1_clk_pz0 {
192				nvidia,pins = "sdmmc1_clk_pz0";
193				nvidia,function = "sdmmc1";
194				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
196				nvidia,tristate = <TEGRA_PIN_DISABLE>;
197			};
198			sdmmc1_cmd_pz1 {
199				nvidia,pins = "sdmmc1_cmd_pz1",
200					      "sdmmc1_dat0_py7",
201					      "sdmmc1_dat1_py6",
202					      "sdmmc1_dat2_py5",
203					      "sdmmc1_dat3_py4";
204				nvidia,function = "sdmmc1";
205				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
206				nvidia,pull = <TEGRA_PIN_PULL_UP>;
207				nvidia,tristate = <TEGRA_PIN_DISABLE>;
208			};
209			sdmmc3_clk_pa6 {
210				nvidia,pins = "sdmmc3_clk_pa6";
211				nvidia,function = "sdmmc3";
212				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
213				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214				nvidia,tristate = <TEGRA_PIN_DISABLE>;
215			};
216			sdmmc3_cmd_pa7 {
217				nvidia,pins = "sdmmc3_cmd_pa7",
218					      "sdmmc3_dat0_pb7",
219					      "sdmmc3_dat1_pb6",
220					      "sdmmc3_dat2_pb5",
221					      "sdmmc3_dat3_pb4",
222					      "sdmmc3_clk_lb_out_pee4",
223					      "sdmmc3_clk_lb_in_pee5";
224				nvidia,function = "sdmmc3";
225				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226				nvidia,pull = <TEGRA_PIN_PULL_UP>;
227				nvidia,tristate = <TEGRA_PIN_DISABLE>;
228			};
229			sdmmc4_clk_pcc4 {
230				nvidia,pins = "sdmmc4_clk_pcc4";
231				nvidia,function = "sdmmc4";
232				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
233				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
234				nvidia,tristate = <TEGRA_PIN_DISABLE>;
235			};
236			sdmmc4_cmd_pt7 {
237				nvidia,pins = "sdmmc4_cmd_pt7",
238					      "sdmmc4_dat0_paa0",
239					      "sdmmc4_dat1_paa1",
240					      "sdmmc4_dat2_paa2",
241					      "sdmmc4_dat3_paa3",
242					      "sdmmc4_dat4_paa4",
243					      "sdmmc4_dat5_paa5",
244					      "sdmmc4_dat6_paa6",
245					      "sdmmc4_dat7_paa7";
246				nvidia,function = "sdmmc4";
247				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248				nvidia,pull = <TEGRA_PIN_PULL_UP>;
249				nvidia,tristate = <TEGRA_PIN_DISABLE>;
250			};
251			pwr_i2c_scl_pz6 {
252				nvidia,pins = "pwr_i2c_scl_pz6",
253					      "pwr_i2c_sda_pz7";
254				nvidia,function = "i2cpwr";
255				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
256				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258				nvidia,lock = <TEGRA_PIN_DISABLE>;
259				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
260			};
261			jtag_rtck {
262				nvidia,pins = "jtag_rtck";
263				nvidia,function = "rtck";
264				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
265				nvidia,pull = <TEGRA_PIN_PULL_UP>;
266				nvidia,tristate = <TEGRA_PIN_DISABLE>;
267			};
268			clk_32k_in {
269				nvidia,pins = "clk_32k_in";
270				nvidia,function = "clk";
271				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
272				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
273				nvidia,tristate = <TEGRA_PIN_DISABLE>;
274			};
275			core_pwr_req {
276				nvidia,pins = "core_pwr_req";
277				nvidia,function = "pwron";
278				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
279				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280				nvidia,tristate = <TEGRA_PIN_DISABLE>;
281			};
282			cpu_pwr_req {
283				nvidia,pins = "cpu_pwr_req";
284				nvidia,function = "cpu";
285				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
286				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287				nvidia,tristate = <TEGRA_PIN_DISABLE>;
288			};
289			pwr_int_n {
290				nvidia,pins = "pwr_int_n";
291				nvidia,function = "pmi";
292				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
293				nvidia,pull = <TEGRA_PIN_PULL_UP>;
294				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295			};
296			reset_out_n {
297				nvidia,pins = "reset_out_n";
298				nvidia,function = "reset_out_n";
299				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
300				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
301				nvidia,tristate = <TEGRA_PIN_DISABLE>;
302			};
303			clk3_out_pee0 {
304				nvidia,pins = "clk3_out_pee0";
305				nvidia,function = "extperiph3";
306				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
307				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308				nvidia,tristate = <TEGRA_PIN_DISABLE>;
309			};
310			dap4_din_pp5 {
311				nvidia,pins = "dap4_din_pp5";
312				nvidia,function = "i2s3";
313				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
314				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
315				nvidia,tristate = <TEGRA_PIN_ENABLE>;
316			};
317			dap4_dout_pp6 {
318				nvidia,pins = "dap4_dout_pp6",
319					      "dap4_fs_pp4",
320					      "dap4_sclk_pp7";
321				nvidia,function = "i2s3";
322				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
324				nvidia,tristate = <TEGRA_PIN_ENABLE>;
325			};
326			gen1_i2c_sda_pc5 {
327				nvidia,pins = "gen1_i2c_sda_pc5",
328					      "gen1_i2c_scl_pc4";
329				nvidia,function = "i2c1";
330				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
331				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
332				nvidia,tristate = <TEGRA_PIN_DISABLE>;
333				nvidia,lock = <TEGRA_PIN_DISABLE>;
334				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
335			};
336			uart2_cts_n_pj5 {
337				nvidia,pins = "uart2_cts_n_pj5";
338				nvidia,function = "uartb";
339				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
340				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
341				nvidia,tristate = <TEGRA_PIN_DISABLE>;
342			};
343			uart2_rts_n_pj6 {
344				nvidia,pins = "uart2_rts_n_pj6";
345				nvidia,function = "uartb";
346				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
347				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
348				nvidia,tristate = <TEGRA_PIN_DISABLE>;
349			};
350			uart2_rxd_pc3 {
351				nvidia,pins = "uart2_rxd_pc3";
352				nvidia,function = "irda";
353				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
354				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
355				nvidia,tristate = <TEGRA_PIN_DISABLE>;
356			};
357			uart2_txd_pc2 {
358				nvidia,pins = "uart2_txd_pc2";
359				nvidia,function = "irda";
360				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
361				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362				nvidia,tristate = <TEGRA_PIN_DISABLE>;
363			};
364			uart3_cts_n_pa1 {
365				nvidia,pins = "uart3_cts_n_pa1",
366					      "uart3_rxd_pw7";
367				nvidia,function = "uartc";
368				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
369				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370				nvidia,tristate = <TEGRA_PIN_DISABLE>;
371			};
372			uart3_rts_n_pc0 {
373				nvidia,pins = "uart3_rts_n_pc0",
374					      "uart3_txd_pw6";
375				nvidia,function = "uartc";
376				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
377				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
378				nvidia,tristate = <TEGRA_PIN_DISABLE>;
379			};
380			hdmi_cec_pee3 {
381				nvidia,pins = "hdmi_cec_pee3";
382				nvidia,function = "cec";
383				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
384				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
385				nvidia,tristate = <TEGRA_PIN_DISABLE>;
386				nvidia,lock = <TEGRA_PIN_DISABLE>;
387				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
388			};
389			hdmi_int_pn7 {
390				nvidia,pins = "hdmi_int_pn7";
391				nvidia,function = "rsvd1";
392				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
393				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
394				nvidia,tristate = <TEGRA_PIN_DISABLE>;
395			};
396			ddc_scl_pv4 {
397				nvidia,pins = "ddc_scl_pv4",
398					      "ddc_sda_pv5";
399				nvidia,function = "i2c4";
400				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
401				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
402				nvidia,tristate = <TEGRA_PIN_DISABLE>;
403				nvidia,lock = <TEGRA_PIN_DISABLE>;
404				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
405			};
406			pj7 {
407				nvidia,pins = "pj7",
408					      "pk7";
409				nvidia,function = "uartd";
410				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
411				nvidia,tristate = <TEGRA_PIN_DISABLE>;
412				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
413			};
414			pb0 {
415				nvidia,pins = "pb0",
416					      "pb1";
417				nvidia,function = "uartd";
418				nvidia,pull = <TEGRA_PIN_PULL_UP>;
419				nvidia,tristate = <TEGRA_PIN_DISABLE>;
420				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
421			};
422			ph0 {
423				nvidia,pins = "ph0";
424				nvidia,function = "pwm0";
425				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426				nvidia,tristate = <TEGRA_PIN_DISABLE>;
427				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
428			};
429			kb_row10_ps2 {
430				nvidia,pins = "kb_row10_ps2";
431				nvidia,function = "uarta";
432				nvidia,pull = <TEGRA_PIN_PULL_UP>;
433				nvidia,tristate = <TEGRA_PIN_DISABLE>;
434				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435			};
436			kb_row9_ps1 {
437				nvidia,pins = "kb_row9_ps1";
438				nvidia,function = "uarta";
439				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
440				nvidia,tristate = <TEGRA_PIN_DISABLE>;
441				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
442			};
443			kb_row6_pr6 {
444				nvidia,pins = "kb_row6_pr6";
445				nvidia,function = "displaya_alt";
446				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
447				nvidia,tristate = <TEGRA_PIN_DISABLE>;
448				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
449			};
450			usb_vbus_en0_pn4 {
451				nvidia,pins = "usb_vbus_en0_pn4",
452					      "usb_vbus_en1_pn5";
453				nvidia,function = "usb";
454				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
455				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456				nvidia,tristate = <TEGRA_PIN_DISABLE>;
457				nvidia,lock = <TEGRA_PIN_DISABLE>;
458				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
459			};
460			drive_sdio1 {
461				nvidia,pins = "drive_sdio1";
462				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
463				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
464				nvidia,pull-down-strength = <32>;
465				nvidia,pull-up-strength = <42>;
466				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
467				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
468			};
469			drive_sdio3 {
470				nvidia,pins = "drive_sdio3";
471				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
472				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
473				nvidia,pull-down-strength = <20>;
474				nvidia,pull-up-strength = <36>;
475				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
476				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
477			};
478			drive_gma {
479				nvidia,pins = "drive_gma";
480				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
481				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
482				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
483				nvidia,pull-down-strength = <1>;
484				nvidia,pull-up-strength = <2>;
485				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
486				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
487				nvidia,drive-type = <1>;
488			};
489			als_irq_l {
490				nvidia,pins = "gpio_x3_aud_px3";
491				nvidia,function = "gmi";
492				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
493				nvidia,tristate = <TEGRA_PIN_ENABLE>;
494				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
495			};
496			codec_irq_l {
497				nvidia,pins = "ph4";
498				nvidia,function = "gmi";
499				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
500				nvidia,tristate = <TEGRA_PIN_DISABLE>;
501				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
502			};
503			lcd_bl_en {
504				nvidia,pins = "ph2";
505				nvidia,function = "gmi";
506				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
507				nvidia,tristate = <TEGRA_PIN_DISABLE>;
508				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
509			};
510			touch_irq_l {
511				nvidia,pins = "gpio_w3_aud_pw3";
512				nvidia,function = "spi6";
513				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
514				nvidia,tristate = <TEGRA_PIN_ENABLE>;
515				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
516			};
517			tpm_davint_l {
518				nvidia,pins = "ph6";
519				nvidia,function = "gmi";
520				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
521				nvidia,tristate = <TEGRA_PIN_ENABLE>;
522				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
523			};
524			ts_irq_l {
525				nvidia,pins = "pk2";
526				nvidia,function = "gmi";
527				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
528				nvidia,tristate = <TEGRA_PIN_ENABLE>;
529				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
530			};
531			ts_reset_l {
532				nvidia,pins = "pk4";
533				nvidia,function = "gmi";
534				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
535				nvidia,tristate = <TEGRA_PIN_DISABLE>;
536				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
537			};
538			ts_shdn_l {
539				nvidia,pins = "pk1";
540				nvidia,function = "gmi";
541				nvidia,pull = <TEGRA_PIN_PULL_UP>;
542				nvidia,tristate = <TEGRA_PIN_DISABLE>;
543				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
544			};
545			ph7 {
546				nvidia,pins = "ph7";
547				nvidia,function = "gmi";
548				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
549				nvidia,tristate = <TEGRA_PIN_DISABLE>;
550				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
551			};
552			kb_col0_ap {
553				nvidia,pins = "kb_col0_pq0";
554				nvidia,function = "rsvd4";
555				nvidia,pull = <TEGRA_PIN_PULL_UP>;
556				nvidia,tristate = <TEGRA_PIN_DISABLE>;
557				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
558			};
559			lid_open {
560				nvidia,pins = "kb_row4_pr4";
561				nvidia,function = "rsvd3";
562				nvidia,pull = <TEGRA_PIN_PULL_UP>;
563				nvidia,tristate = <TEGRA_PIN_DISABLE>;
564				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
565			};
566			en_vdd_sd {
567				nvidia,pins = "kb_row0_pr0";
568				nvidia,function = "rsvd4";
569				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
570				nvidia,tristate = <TEGRA_PIN_DISABLE>;
571				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
572			};
573			ac_ok {
574				nvidia,pins = "pj0";
575				nvidia,function = "gmi";
576				nvidia,pull = <TEGRA_PIN_PULL_UP>;
577				nvidia,tristate = <TEGRA_PIN_ENABLE>;
578				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
579			};
580			sensor_irq_l {
581				nvidia,pins = "pi6";
582				nvidia,function = "gmi";
583				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
584				nvidia,tristate = <TEGRA_PIN_DISABLE>;
585				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
586			};
587			wifi_en {
588				nvidia,pins = "gpio_x7_aud_px7";
589				nvidia,function = "rsvd4";
590				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
591				nvidia,tristate = <TEGRA_PIN_DISABLE>;
592				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593			};
594			wifi_rst_l {
595				nvidia,pins = "clk2_req_pcc5";
596				nvidia,function = "dap";
597				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
598				nvidia,tristate = <TEGRA_PIN_DISABLE>;
599				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
600			};
601			hp_det_l {
602				nvidia,pins = "ulpi_data1_po2";
603				nvidia,function = "spi3";
604				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
605				nvidia,tristate = <TEGRA_PIN_DISABLE>;
606				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607			};
608		};
609	};
610
611	serial@70006000 {
612		status = "okay";
613	};
614
615	pwm@7000a000 {
616		status = "okay";
617	};
618
619	i2c@7000c000 {
620		status = "okay";
621		clock-frequency = <100000>;
622
623		acodec: audio-codec@10 {
624			compatible = "maxim,max98090";
625			reg = <0x10>;
626			interrupt-parent = <&gpio>;
627			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
628		};
629	};
630
631	i2c@7000c400 {
632		status = "okay";
633		clock-frequency = <100000>;
634
635		trackpad@4b {
636			compatible = "atmel,maxtouch";
637			reg = <0x4b>;
638			interrupt-parent = <&gpio>;
639			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
640			linux,gpio-keymap = <0 0 0 BTN_LEFT>;
641		};
642	};
643
644	i2c@7000c500 {
645		status = "okay";
646		clock-frequency = <100000>;
647	};
648
649	hdmi_ddc: i2c@7000c700 {
650		status = "okay";
651		clock-frequency = <100000>;
652	};
653
654	i2c@7000d000 {
655		status = "okay";
656		clock-frequency = <400000>;
657
658		pmic: pmic@40 {
659			compatible = "ams,as3722";
660			reg = <0x40>;
661			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
662
663			ams,system-power-controller;
664
665			#interrupt-cells = <2>;
666			interrupt-controller;
667
668			gpio-controller;
669			#gpio-cells = <2>;
670
671			pinctrl-names = "default";
672			pinctrl-0 = <&as3722_default>;
673
674			as3722_default: pinmux {
675				gpio0 {
676					pins = "gpio0";
677					function = "gpio";
678					bias-pull-down;
679				};
680
681				gpio1_2_4_7 {
682					pins = "gpio1", "gpio2", "gpio4", "gpio7";
683					function = "gpio";
684					bias-pull-up;
685				};
686
687				gpio3_6 {
688					pins = "gpio3", "gpio6";
689					bias-high-impedance;
690				};
691
692				gpio5 {
693					pins = "gpio5";
694					function = "clk32k-out";
695				};
696			};
697
698			regulators {
699				vsup-sd2-supply = <&vdd_5v0_sys>;
700				vsup-sd3-supply = <&vdd_5v0_sys>;
701				vsup-sd4-supply = <&vdd_5v0_sys>;
702				vsup-sd5-supply = <&vdd_5v0_sys>;
703				vin-ldo0-supply = <&vdd_1v35_lp0>;
704				vin-ldo1-6-supply = <&vdd_3v3_run>;
705				vin-ldo2-5-7-supply = <&vddio_1v8>;
706				vin-ldo3-4-supply = <&vdd_3v3_sys>;
707				vin-ldo9-10-supply = <&vdd_5v0_sys>;
708				vin-ldo11-supply = <&vdd_3v3_run>;
709
710				sd0 {
711					regulator-name = "+VDD_CPU_AP";
712					regulator-min-microvolt = <700000>;
713					regulator-max-microvolt = <1400000>;
714					regulator-min-microamp = <3500000>;
715					regulator-max-microamp = <3500000>;
716					regulator-always-on;
717					regulator-boot-on;
718					ams,ext-control = <2>;
719				};
720
721				sd1 {
722					regulator-name = "+VDD_CORE";
723					regulator-min-microvolt = <700000>;
724					regulator-max-microvolt = <1350000>;
725					regulator-min-microamp = <2500000>;
726					regulator-max-microamp = <2500000>;
727					regulator-always-on;
728					regulator-boot-on;
729					ams,ext-control = <1>;
730				};
731
732				vdd_1v35_lp0: sd2 {
733					regulator-name = "+1.35V_LP0(sd2)";
734					regulator-min-microvolt = <1350000>;
735					regulator-max-microvolt = <1350000>;
736					regulator-always-on;
737					regulator-boot-on;
738				};
739
740				sd3 {
741					regulator-name = "+1.35V_LP0(sd3)";
742					regulator-min-microvolt = <1350000>;
743					regulator-max-microvolt = <1350000>;
744					regulator-always-on;
745					regulator-boot-on;
746				};
747
748				vdd_1v05_run: sd4 {
749					regulator-name = "+1.05V_RUN";
750					regulator-min-microvolt = <1050000>;
751					regulator-max-microvolt = <1050000>;
752				};
753
754				vddio_1v8: sd5 {
755					regulator-name = "+1.8V_VDDIO";
756					regulator-min-microvolt = <1800000>;
757					regulator-max-microvolt = <1800000>;
758					regulator-boot-on;
759					regulator-always-on;
760				};
761
762				vdd_gpu: sd6 {
763					regulator-name = "+VDD_GPU_AP";
764					regulator-min-microvolt = <650000>;
765					regulator-max-microvolt = <1200000>;
766					regulator-min-microamp = <3500000>;
767					regulator-max-microamp = <3500000>;
768					regulator-boot-on;
769					regulator-always-on;
770				};
771
772				avdd_1v05_run: ldo0 {
773					regulator-name = "+1.05V_RUN_AVDD";
774					regulator-min-microvolt = <1050000>;
775					regulator-max-microvolt = <1050000>;
776					regulator-boot-on;
777					regulator-always-on;
778					ams,ext-control = <1>;
779				};
780
781				ldo1 {
782					regulator-name = "+1.8V_RUN_CAM";
783					regulator-min-microvolt = <1800000>;
784					regulator-max-microvolt = <1800000>;
785				};
786
787				ldo2 {
788					regulator-name = "+1.2V_GEN_AVDD";
789					regulator-min-microvolt = <1200000>;
790					regulator-max-microvolt = <1200000>;
791					regulator-boot-on;
792					regulator-always-on;
793				};
794
795				ldo3 {
796					regulator-name = "+1.00V_LP0_VDD_RTC";
797					regulator-min-microvolt = <1000000>;
798					regulator-max-microvolt = <1000000>;
799					regulator-boot-on;
800					regulator-always-on;
801					ams,enable-tracking;
802				};
803
804				vdd_run_cam: ldo4 {
805					regulator-name = "+3.3V_RUN_CAM";
806					regulator-min-microvolt = <2800000>;
807					regulator-max-microvolt = <2800000>;
808				};
809
810				ldo5 {
811					regulator-name = "+1.2V_RUN_CAM_FRONT";
812					regulator-min-microvolt = <1200000>;
813					regulator-max-microvolt = <1200000>;
814				};
815
816				vddio_sdmmc3: ldo6 {
817					regulator-name = "+VDDIO_SDMMC3";
818					regulator-min-microvolt = <1800000>;
819					regulator-max-microvolt = <3300000>;
820				};
821
822				ldo7 {
823					regulator-name = "+1.05V_RUN_CAM_REAR";
824					regulator-min-microvolt = <1050000>;
825					regulator-max-microvolt = <1050000>;
826				};
827
828				ldo9 {
829					regulator-name = "+2.8V_RUN_TOUCH";
830					regulator-min-microvolt = <2800000>;
831					regulator-max-microvolt = <2800000>;
832				};
833
834				ldo10 {
835					regulator-name = "+2.8V_RUN_CAM_AF";
836					regulator-min-microvolt = <2800000>;
837					regulator-max-microvolt = <2800000>;
838				};
839
840				ldo11 {
841					regulator-name = "+1.8V_RUN_VPP_FUSE";
842					regulator-min-microvolt = <1800000>;
843					regulator-max-microvolt = <1800000>;
844				};
845			};
846		};
847	};
848
849	spi@7000d400 {
850		status = "okay";
851
852		cros_ec: cros-ec@0 {
853			compatible = "google,cros-ec-spi";
854			spi-max-frequency = <4000000>;
855			interrupt-parent = <&gpio>;
856			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
857			reg = <0>;
858
859			google,cros-ec-spi-msg-delay = <2000>;
860
861			i2c-tunnel {
862				compatible = "google,cros-ec-i2c-tunnel";
863				#address-cells = <1>;
864				#size-cells = <0>;
865
866				google,remote-bus = <0>;
867
868				charger: bq24735@9 {
869					compatible = "ti,bq24735";
870					reg = <0x9>;
871					interrupt-parent = <&gpio>;
872					interrupts = <TEGRA_GPIO(J, 0)
873							IRQ_TYPE_EDGE_BOTH>;
874					ti,ac-detect-gpios = <&gpio
875							TEGRA_GPIO(J, 0)
876							GPIO_ACTIVE_HIGH>;
877				};
878
879				battery: sbs-battery@b {
880					compatible = "sbs,sbs-battery";
881					reg = <0xb>;
882					sbs,i2c-retry-count = <2>;
883					sbs,poll-retry-count = <1>;
884				};
885			};
886		};
887	};
888
889	spi@7000da00 {
890		status = "okay";
891		spi-max-frequency = <25000000>;
892
893		flash@0 {
894			compatible = "winbond,w25q32dw", "jedec,spi-nor";
895			reg = <0>;
896			spi-max-frequency = <20000000>;
897		};
898	};
899
900	pmc@7000e400 {
901		nvidia,invert-interrupt;
902		nvidia,suspend-mode = <1>;
903		nvidia,cpu-pwr-good-time = <500>;
904		nvidia,cpu-pwr-off-time = <300>;
905		nvidia,core-pwr-good-time = <641 3845>;
906		nvidia,core-pwr-off-time = <61036>;
907		nvidia,core-power-req-active-high;
908		nvidia,sys-clock-req-active-high;
909	};
910
911	hda@70030000 {
912		status = "okay";
913	};
914
915	usb@70090000 {
916		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
917		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
918		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
919		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
920		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
921		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
922
923		avddio-pex-supply = <&vdd_1v05_run>;
924		dvddio-pex-supply = <&vdd_1v05_run>;
925		avdd-usb-supply = <&vdd_3v3_lp0>;
926		avdd-pll-utmip-supply = <&vddio_1v8>;
927		avdd-pll-erefe-supply = <&avdd_1v05_run>;
928		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
929		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
930		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
931
932		status = "okay";
933	};
934
935	padctl@7009f000 {
936		avdd-pll-utmip-supply = <&vddio_1v8>;
937		avdd-pll-erefe-supply = <&avdd_1v05_run>;
938		avdd-pex-pll-supply = <&vdd_1v05_run>;
939		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
940
941		pads {
942			usb2 {
943				status = "okay";
944
945				lanes {
946					usb2-0 {
947						nvidia,function = "xusb";
948						status = "okay";
949					};
950
951					usb2-1 {
952						nvidia,function = "xusb";
953						status = "okay";
954					};
955
956					usb2-2 {
957						nvidia,function = "xusb";
958						status = "okay";
959					};
960				};
961			};
962
963			pcie {
964				status = "okay";
965
966				lanes {
967					pcie-0 {
968						nvidia,function = "usb3-ss";
969						status = "okay";
970					};
971
972					pcie-1 {
973						nvidia,function = "usb3-ss";
974						status = "okay";
975					};
976				};
977			};
978		};
979
980		ports {
981			usb2-0 {
982				status = "okay";
983				mode = "otg";
984				usb-role-switch;
985				vbus-supply = <&vdd_usb1_vbus>;
986			};
987
988			usb2-1 {
989				status = "okay";
990				mode = "host";
991
992				vbus-supply = <&vdd_run_cam>;
993			};
994
995			usb2-2 {
996				status = "okay";
997				mode = "host";
998
999				vbus-supply = <&vdd_usb3_vbus>;
1000			};
1001
1002			usb3-0 {
1003				nvidia,usb2-companion = <0>;
1004				status = "okay";
1005			};
1006
1007			usb3-1 {
1008				nvidia,usb2-companion = <2>;
1009				status = "okay";
1010			};
1011		};
1012	};
1013
1014	mmc@700b0400 {
1015		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
1016		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1017		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1018		status = "okay";
1019		bus-width = <4>;
1020		vqmmc-supply = <&vddio_sdmmc3>;
1021	};
1022
1023	mmc@700b0600 {
1024		status = "okay";
1025		bus-width = <8>;
1026		non-removable;
1027	};
1028
1029	ahub@70300000 {
1030		i2s@70301100 {
1031			status = "okay";
1032		};
1033	};
1034
1035	usb@7d000000 {
1036		status = "okay";
1037	};
1038
1039	usb-phy@7d000000 {
1040		status = "okay";
1041		vbus-supply = <&vdd_usb1_vbus>;
1042	};
1043
1044	usb@7d004000 {
1045		status = "okay";
1046	};
1047
1048	usb-phy@7d004000 {
1049		status = "okay";
1050		vbus-supply = <&vdd_run_cam>;
1051	};
1052
1053	usb@7d008000 {
1054		status = "okay";
1055	};
1056
1057	usb-phy@7d008000 {
1058		status = "okay";
1059		vbus-supply = <&vdd_usb3_vbus>;
1060	};
1061
1062	backlight: backlight {
1063		compatible = "pwm-backlight";
1064
1065		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1066		power-supply = <&vdd_led>;
1067		pwms = <&pwm 1 1000000>;
1068
1069		brightness-levels = <0 4 8 16 32 64 128 255>;
1070		default-brightness-level = <6>;
1071	};
1072
1073	clk32k_in: clock-32k {
1074		compatible = "fixed-clock";
1075		clock-frequency = <32768>;
1076		#clock-cells = <0>;
1077	};
1078
1079	gpio-keys {
1080		compatible = "gpio-keys";
1081
1082		key-power {
1083			label = "Power";
1084			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1085			linux,code = <KEY_POWER>;
1086			debounce-interval = <10>;
1087			wakeup-source;
1088		};
1089	};
1090
1091	vdd_mux: regulator-mux {
1092		compatible = "regulator-fixed";
1093		regulator-name = "+VDD_MUX";
1094		regulator-min-microvolt = <12000000>;
1095		regulator-max-microvolt = <12000000>;
1096		regulator-always-on;
1097		regulator-boot-on;
1098	};
1099
1100	vdd_5v0_sys: regulator-5v0sys {
1101		compatible = "regulator-fixed";
1102		regulator-name = "+5V_SYS";
1103		regulator-min-microvolt = <5000000>;
1104		regulator-max-microvolt = <5000000>;
1105		regulator-always-on;
1106		regulator-boot-on;
1107		vin-supply = <&vdd_mux>;
1108	};
1109
1110	vdd_3v3_sys: regulator-3v3sys {
1111		compatible = "regulator-fixed";
1112		regulator-name = "+3.3V_SYS";
1113		regulator-min-microvolt = <3300000>;
1114		regulator-max-microvolt = <3300000>;
1115		regulator-always-on;
1116		regulator-boot-on;
1117		vin-supply = <&vdd_mux>;
1118	};
1119
1120	vdd_3v3_run: regulator-3v3run {
1121		compatible = "regulator-fixed";
1122		regulator-name = "+3.3V_RUN";
1123		regulator-min-microvolt = <3300000>;
1124		regulator-max-microvolt = <3300000>;
1125		regulator-always-on;
1126		regulator-boot-on;
1127		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1128		enable-active-high;
1129		vin-supply = <&vdd_3v3_sys>;
1130	};
1131
1132	vdd_3v3_hdmi: regulator-hdmi {
1133		compatible = "regulator-fixed";
1134		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1135		regulator-min-microvolt = <3300000>;
1136		regulator-max-microvolt = <3300000>;
1137		vin-supply = <&vdd_3v3_run>;
1138	};
1139
1140	vdd_led: regulator-led {
1141		compatible = "regulator-fixed";
1142		regulator-name = "+VDD_LED";
1143		regulator-min-microvolt = <3300000>;
1144		regulator-max-microvolt = <3300000>;
1145		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1146		enable-active-high;
1147		vin-supply = <&vdd_mux>;
1148	};
1149
1150	vdd_5v0_ts: regulator-ts {
1151		compatible = "regulator-fixed";
1152		regulator-name = "+5V_VDD_TS_SW";
1153		regulator-min-microvolt = <5000000>;
1154		regulator-max-microvolt = <5000000>;
1155		regulator-boot-on;
1156		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1157		enable-active-high;
1158		vin-supply = <&vdd_5v0_sys>;
1159	};
1160
1161	vdd_usb1_vbus: regulator-usb1 {
1162		compatible = "regulator-fixed";
1163		regulator-name = "+5V_USB_HS";
1164		regulator-min-microvolt = <5000000>;
1165		regulator-max-microvolt = <5000000>;
1166		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1167		enable-active-high;
1168		gpio-open-drain;
1169		vin-supply = <&vdd_5v0_sys>;
1170	};
1171
1172	vdd_usb3_vbus: regulator-usb3 {
1173		compatible = "regulator-fixed";
1174		regulator-name = "+5V_USB_SS";
1175		regulator-min-microvolt = <5000000>;
1176		regulator-max-microvolt = <5000000>;
1177		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1178		enable-active-high;
1179		gpio-open-drain;
1180		vin-supply = <&vdd_5v0_sys>;
1181	};
1182
1183	vdd_3v3_panel: regulator-panel {
1184		compatible = "regulator-fixed";
1185		regulator-name = "+3.3V_PANEL";
1186		regulator-min-microvolt = <3300000>;
1187		regulator-max-microvolt = <3300000>;
1188		gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1189		enable-active-high;
1190		vin-supply = <&vdd_3v3_run>;
1191	};
1192
1193	vdd_3v3_lp0: regulator-lp0 {
1194		compatible = "regulator-fixed";
1195		regulator-name = "+3.3V_LP0";
1196		regulator-min-microvolt = <3300000>;
1197		regulator-max-microvolt = <3300000>;
1198		/*
1199		 * TODO: find a way to wire this up with the USB EHCI
1200		 * controllers so that it can be enabled on demand.
1201		 */
1202		regulator-always-on;
1203		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1204		enable-active-high;
1205		vin-supply = <&vdd_3v3_sys>;
1206	};
1207
1208	vdd_hdmi_pll: regulator-hdmipll {
1209		compatible = "regulator-fixed";
1210		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1211		regulator-min-microvolt = <1050000>;
1212		regulator-max-microvolt = <1050000>;
1213		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1214		vin-supply = <&vdd_1v05_run>;
1215	};
1216
1217	vdd_5v0_hdmi: regulator-hdmicon {
1218		compatible = "regulator-fixed";
1219		regulator-name = "+5V_HDMI_CON";
1220		regulator-min-microvolt = <5000000>;
1221		regulator-max-microvolt = <5000000>;
1222		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1223		enable-active-high;
1224		vin-supply = <&vdd_5v0_sys>;
1225	};
1226
1227	sound {
1228		compatible = "nvidia,tegra-audio-max98090-venice2",
1229			     "nvidia,tegra-audio-max98090";
1230		nvidia,model = "NVIDIA Tegra Venice2";
1231
1232		nvidia,audio-routing =
1233			"Headphones", "HPR",
1234			"Headphones", "HPL",
1235			"Speakers", "SPKR",
1236			"Speakers", "SPKL",
1237			"Mic Jack", "MICBIAS",
1238			"IN34", "Mic Jack";
1239
1240		nvidia,i2s-controller = <&tegra_i2s1>;
1241		nvidia,audio-codec = <&acodec>;
1242
1243		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1244			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1245			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1246		clock-names = "pll_a", "pll_a_out0", "mclk";
1247
1248		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
1249				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1250
1251		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1252					 <&tegra_car TEGRA124_CLK_EXTERN1>;
1253	};
1254};
1255
1256#include "cros-ec-keyboard.dtsi"
1257