1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *   Timers Module
4  */
5 
6 #ifndef __ASM_MACH_REGS_TIMERS_H
7 #define __ASM_MACH_REGS_TIMERS_H
8 
9 #define TMR_CCR		(0x0000)
10 #define TMR_TN_MM(n, m)	(0x0004 + ((n) << 3) + (((n) + (m)) << 2))
11 #define TMR_CR(n)	(0x0028 + ((n) << 2))
12 #define TMR_SR(n)	(0x0034 + ((n) << 2))
13 #define TMR_IER(n)	(0x0040 + ((n) << 2))
14 #define TMR_PLVR(n)	(0x004c + ((n) << 2))
15 #define TMR_PLCR(n)	(0x0058 + ((n) << 2))
16 #define TMR_WMER	(0x0064)
17 #define TMR_WMR		(0x0068)
18 #define TMR_WVR		(0x006c)
19 #define TMR_WSR		(0x0070)
20 #define TMR_ICR(n)	(0x0074 + ((n) << 2))
21 #define TMR_WICR	(0x0080)
22 #define TMR_CER		(0x0084)
23 #define TMR_CMR		(0x0088)
24 #define TMR_ILR(n)	(0x008c + ((n) << 2))
25 #define TMR_WCR		(0x0098)
26 #define TMR_WFAR	(0x009c)
27 #define TMR_WSAR	(0x00A0)
28 #define TMR_CVWR(n)	(0x00A4 + ((n) << 2))
29 
30 #define TMR_CCR_CS_0(x)	(((x) & 0x3) << 0)
31 #define TMR_CCR_CS_1(x)	(((x) & 0x7) << 2)
32 #define TMR_CCR_CS_2(x)	(((x) & 0x3) << 5)
33 
34 #endif /* __ASM_MACH_REGS_TIMERS_H */
35